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| author | Wolfgang Denk <wd@denx.de> | 2011-12-01 23:58:11 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-12-01 23:58:11 +0100 |
| commit | d51e6d6de2b7dcba43fadcae2c89f7346d8bc301 (patch) | |
| tree | 49bedf2073e031a421c89644f62134bf9ee4f44b /README | |
| parent | 22e0f5a9ecab85f36a0fe69892d950c1ac212c91 (diff) | |
| parent | 9839709ea3df89f6021034508f48b97cab33ebb8 (diff) | |
| download | u-boot-imx-d51e6d6de2b7dcba43fadcae2c89f7346d8bc301.zip u-boot-imx-d51e6d6de2b7dcba43fadcae2c89f7346d8bc301.tar.gz u-boot-imx-d51e6d6de2b7dcba43fadcae2c89f7346d8bc301.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: support for Freescale COM Express P2020
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
mpc85xx: support board-specific reset function
powerpc/85xx: verify the localbus device tree address before booting the OS
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
powerpc/p3060qds: Add board related support for P3060QDS platform
powerpc/85xx: clean up and document the QE/FMAN microcode macros
powerpc/85xx: always implement the work-around for Erratum SATA_A001
powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
powerpc/85xx: Add workaround for erratum A-003474
powerpc/85xx: fixup flexcan device tree clock-frequency
powerpc/85xx: Add workaround for erratum CPU-A003999
Diffstat (limited to 'README')
| -rw-r--r-- | README | 38 |
1 files changed, 38 insertions, 0 deletions
@@ -3274,6 +3274,44 @@ Low Level (hardware related) configuration options: be used if available. These functions may be faster under some conditions but may increase the binary size. +Freescale QE/FMAN Firmware Support: +----------------------------------- + +The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the +loading of "firmware", which is encoded in the QE firmware binary format. +This firmware often needs to be loaded during U-Boot booting, so macros +are used to identify the storage device (NOR flash, SPI, etc) and the address +within that device. + +- CONFIG_SYS_QE_FMAN_FW_ADDR + The address in the storage device where the firmware is located. The + meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro + is also specified. + +- CONFIG_SYS_QE_FMAN_FW_LENGTH + The maximum possible size of the firmware. The firmware binary format + has a field that specifies the actual size of the firmware, but it + might not be possible to read any part of the firmware unless some + local storage is allocated to hold the entire firmware first. + +- CONFIG_SYS_QE_FMAN_FW_IN_NOR + Specifies that QE/FMAN firmware is located in NOR flash, mapped as + normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the + virtual address in NOR flash. + +- CONFIG_SYS_QE_FMAN_FW_IN_NAND + Specifies that QE/FMAN firmware is located in NAND flash. + CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash. + +- CONFIG_SYS_QE_FMAN_FW_IN_MMC + Specifies that QE/FMAN firmware is located on the primary SD/MMC + device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. + +- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH + Specifies that QE/FMAN firmware is located on the primary SPI + device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. + + Building the Software: ====================== |