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authorChristian Riesch <christian.riesch@omicron.at>2012-02-02 00:44:39 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-02-12 10:11:33 +0100
commitb67d8816fd62f0a379caa16846381b5a4e4de398 (patch)
tree26c11e8d3187e2081290feb7d9fa6955aafb1973 /README
parentda104e04ecc30b90fdc121737f220f0d9c252196 (diff)
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arm, arm926ejs: Add option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH that allows setting the correct value for the V bit. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'README')
-rw-r--r--README6
1 files changed, 6 insertions, 0 deletions
diff --git a/README b/README
index 4343057..b6c9d0b 100644
--- a/README
+++ b/README
@@ -420,6 +420,12 @@ The following options need to be configured:
XWAY SoCs for booting from NOR flash. The U-Boot image needs to
be swapped if a flash programmer is used.
+- ARM options:
+ CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+
+ Select high exception vectors of the ARM core, e.g., do not
+ clear the V bit of the c1 register of CP15.
+
- Linux Kernel Interface:
CONFIG_CLOCKS_IN_MHZ