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| author | York Sun <yorksun@freescale.com> | 2013-09-30 14:20:51 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-11-25 11:43:46 -0800 |
| commit | 9ac4ffbde1a5015c9929ee8578d3811b716e2fd3 (patch) | |
| tree | af5bb5560a3ffc9a170b8829617785db73ad2bb8 /README | |
| parent | 9a17eb5b7e7ba528c278a9677c38d7ae722d93ec (diff) | |
| download | u-boot-imx-9ac4ffbde1a5015c9929ee8578d3811b716e2fd3.zip u-boot-imx-9ac4ffbde1a5015c9929ee8578d3811b716e2fd3.tar.gz u-boot-imx-9ac4ffbde1a5015c9929ee8578d3811b716e2fd3.tar.bz2 | |
Driver/DDR: Add Freescale DDR driver for ARM
Make PowerPC specific code conditional so ARM SoCs can reuse
this driver. Add DDR3 driver for ARM.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -450,6 +450,9 @@ The following options need to be configured: CONFIG_SYS_FSL_DDRC_GEN3 Freescale DDR3 controller. + CONFIG_SYS_FSL_DDRC_ARM_GEN3 + Freescale DDR3 controller for ARM-based SoCs. + CONFIG_SYS_FSL_DDR1 Board config to use DDR1. It can be enabled for SoCs with Freescale DDR1 or DDR2 controllers, depending on the board |