summaryrefslogtreecommitdiff
path: root/Makefile
diff options
context:
space:
mode:
authorStephen Warren <swarren@nvidia.com>2013-02-26 12:28:28 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-03-13 22:24:14 +0100
commitc44bb3a30f5a1332176edce1a91c0e2cf666ee8f (patch)
tree8d2728b07687ed98d87976b4f300059770258de1 /Makefile
parent0678587fb6f517d40c461f1d43fe7a6ff430f168 (diff)
downloadu-boot-imx-c44bb3a30f5a1332176edce1a91c0e2cf666ee8f.zip
u-boot-imx-c44bb3a30f5a1332176edce1a91c0e2cf666ee8f.tar.gz
u-boot-imx-c44bb3a30f5a1332176edce1a91c0e2cf666ee8f.tar.bz2
ARM: tegra: enable some CPU errata workarounds
Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such, some CPU errata exist, and must be worked around. These must be worked around in the bootloader, since in general, the kernel (especially a multi-platform kernel) needs to support being launched in non-secure mode (normal world), and hence may not be able to write to the CP15 register to enable these workarounds. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions