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author | Macpaul Lin <macpaul@andestech.com> | 2011-09-26 17:44:34 +0800 |
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committer | Macpaul Lin <macpaul@andestech.com> | 2011-11-09 16:35:27 +0800 |
commit | 2ba5b1d32433698a66c0548bbc9e0c867ab55be2 (patch) | |
tree | 9e917a01a0175b490b8d5447543aa5fe5ae036fc /MAKEALL | |
parent | 0f3864a966cc88ac90d8e403aa634254657d874d (diff) | |
download | u-boot-imx-2ba5b1d32433698a66c0548bbc9e0c867ab55be2.zip u-boot-imx-2ba5b1d32433698a66c0548bbc9e0c867ab55be2.tar.gz u-boot-imx-2ba5b1d32433698a66c0548bbc9e0c867ab55be2.tar.bz2 |
dwcddr21mctl: Synopsys DWC DDR2/1 Memory Controller
Header definitions of Synopsys DWC DDR2/1 Memory Controller.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Diffstat (limited to 'MAKEALL')
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