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| author | Stephen Warren <swarren@nvidia.com> | 2014-02-03 14:03:25 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2014-03-05 16:59:08 -0700 |
| commit | f3026c16836b0bdc2b4a170f29005d834a748c5e (patch) | |
| tree | 6939a6519bfd0785dbabf817703114be7de6886e /MAKEALL | |
| parent | cd7efc2a947b30a2047b248f66ddfa8b182fda64 (diff) | |
| download | u-boot-imx-f3026c16836b0bdc2b4a170f29005d834a748c5e.zip u-boot-imx-f3026c16836b0bdc2b4a170f29005d834a748c5e.tar.gz u-boot-imx-f3026c16836b0bdc2b4a170f29005d834a748c5e.tar.bz2 | |
ARM: tegra: fix pmc_pwrgate_timer_mult register definition
Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and
Tegra124. Reflect this in pmc.h.
Also, simply write the whole of the register in start_cpu() rather than
doing a read-modify-write; the register is simple enough that the code
can easily construct the entire desired value.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'MAKEALL')
0 files changed, 0 insertions, 0 deletions