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| author | Anish Trivedi <anish@freescale.com> | 2011-01-28 12:03:09 -0600 |
|---|---|---|
| committer | Anish Trivedi <anish@freescale.com> | 2011-01-28 14:48:06 -0600 |
| commit | c8087980af087ef280bbf59d62fff8c2c78f79ad (patch) | |
| tree | fae5265945761d76ef97102102516046195df940 /MAKEALL | |
| parent | a069e6b2ca7e8f0ad39375ca12bec11bb0d41ba4 (diff) | |
| download | u-boot-imx-c8087980af087ef280bbf59d62fff8c2c78f79ad.zip u-boot-imx-c8087980af087ef280bbf59d62fff8c2c78f79ad.tar.gz u-boot-imx-c8087980af087ef280bbf59d62fff8c2c78f79ad.tar.bz2 | |
ENGR00138635 MX50 Update mDDR script to use more optimized settings
New mDDR (LPDDR1) initialization script from designer includes
controller changes as well as very important PHY changes that increase
internal sampling window to detect DQS edge. This increase
compensates for possible jitter.
The script, Codex_LPDDR1_200MHz.inc v4, is found at
http://compass.freescale.net/livelink/
livelink?func=ll&objId=218722501&objAction=browse&viewType=1
Signed-off-by: Anish Trivedi <anish@freescale.com>
Diffstat (limited to 'MAKEALL')
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