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authorStefan Roese <sr@denx.de>2006-03-17 10:28:24 +0100
committerStefan Roese <sr@denx.de>2006-03-31 14:32:07 +0200
commit62534beb2fdd67490c3723f22b8982e7d64fc104 (patch)
tree3843bdce63bfeb6b9df290121b2650533397ed7f /MAKEALL
parent05d8dce9d07cf4073ea15fbc448c1ce22b6baf0f (diff)
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Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
405 SDRAM: - The SDRAM parameters can now be defined in the board config file and the 405 SDRAM controller values will be calculated upon bootup (see PPChameleonEVB). When those settings are not defined in the board config file, the register setup will be as it is now, so this implementation should not break any current design using this code. Thanks to Andrea Marson from DAVE for this patch. 440 DDR: - Added function sdram_tr1_set to auto calculate the TR1 value for the DDR. - Added ECC support (see p3p440). Patch by Stefan Roese, 17 Mar 2006
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