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| author | Ash Charles <ashcharles@gmail.com> | 2015-04-28 16:17:53 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-05-10 07:29:39 -0400 |
| commit | ce170a1c3d7223d678491e4180b088d196379eef (patch) | |
| tree | f303e130ab366a8b38d03049203c493837cd8f71 /MAINTAINERS | |
| parent | 2ed43b549b8c40ab372b2be2d6f14be6bf89cb43 (diff) | |
| download | u-boot-imx-ce170a1c3d7223d678491e4180b088d196379eef.zip u-boot-imx-ce170a1c3d7223d678491e4180b088d196379eef.tar.gz u-boot-imx-ce170a1c3d7223d678491e4180b088d196379eef.tar.bz2 | |
omap3: overo: Use software BCH8 ECC for NAND
Overo COMs have NAND flash that requires 4-bit ECC or better except for
the first sector which can use 1-bit ECC. The boot ROM expects to load
a payload from NAND written using 1-bit hardware-based ECC. In short,
write SPL to NAND something like this (4 times for redundancy):
#> nandecc hw
#> nand write ${loadaddr} 0x0 ${filesize}
#> nand write ${loadaddr} 0x20000 ${filesize}
#> nand write ${loadaddr} 0x40000 ${filesize}
#> nand write ${loadaddr} 0x60000 ${filesize}
Then, switch back to software-based BCH8 for everything else:
#> nandecc sw bch8
After [1], enlarge the max size of the SPL so the BCH code can fit.
[1] https://www.mail-archive.com/u-boot@lists.denx.de/msg163912.html
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Diffstat (limited to 'MAINTAINERS')
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