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author | Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | 2008-03-25 21:30:07 +0900 |
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committer | Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | 2008-03-25 21:30:07 +0900 |
commit | d43d43ef2845af309c25a64bb9c2c5fb3261bc23 (patch) | |
tree | 8110ca5dee67d093aebfee728e838e3fdd89f7d5 /CREDITS | |
parent | 26138623230ca2bad3c78e05a65527ea70c8b688 (diff) | |
download | u-boot-imx-d43d43ef2845af309c25a64bb9c2c5fb3261bc23.zip u-boot-imx-d43d43ef2845af309c25a64bb9c2c5fb3261bc23.tar.gz u-boot-imx-d43d43ef2845af309c25a64bb9c2c5fb3261bc23.tar.bz2 |
[MIPS] Initialize CP0 Cause before setting up CP0 Status register
Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions