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authorMarek Vasut <marex@denx.de>2012-05-03 05:47:18 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 08:31:32 +0200
commitd2f7ae14d387cf1882a3a38d27c8f237fa191a26 (patch)
treec794a1a763de6651fd0fa7b0047a38314f8106ac /CREDITS
parent6725ebdff566df1e7bb137f03e775b9339595e5f (diff)
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Revert "i.MX28: Enable additional DRAM address bits"
This reverts commit 69d26d09de1cb93e0a09ca71d9f0d41a66f0756a. Apparently, this commit got mainline only because of out-of-tree port and causes breakage on board that is mainline. Revert. Reason: * The OOT board has 512MB of DRAM, enabling this additional address line enabled it to work fine with 512MB of RAM. * Every mainline port has max. 256MB of DRAM, therefore this revert has no impact on any mainline port * Though this caused a problem with new M28 board with 256MB of DRAM where the chips are wired differently. The patch-to-be-reverted caused the DRAM to behave like this: [128MB chunk #1][128MB chunk #1 again][128MB chunk #2][128MB chunk #2 again] Therefore to retain the current one-memory-init-rules-them-all situation, revert this patch until another board emerges and will actually be pushed mainline that needs different setup. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com>
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