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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-03-13 00:50:48 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-03-13 00:50:48 +0100 |
| commit | c15f80eaefa7ece72272e6f441f0ed36eab14411 (patch) | |
| tree | 6e422368dda72ce81f7ce582e9f664d2b1db3359 /CHANGELOG | |
| parent | b38dbd4622a2abeedf9fcb1806958d9afac0bbd4 (diff) | |
| download | u-boot-imx-c15f80eaefa7ece72272e6f441f0ed36eab14411.zip u-boot-imx-c15f80eaefa7ece72272e6f441f0ed36eab14411.tar.gz u-boot-imx-c15f80eaefa7ece72272e6f441f0ed36eab14411.tar.bz2 | |
Change the sequence of events in soft_i2c.c:send_ack() to keep from
incorrectly generating start/stop conditions on the bus.
Patch by Andrew Dyer, 26 Jul 2005
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -2,6 +2,10 @@ Changes since U-Boot 1.1.4: ====================================================================== +* Change the sequence of events in soft_i2c.c:send_ack() to keep from + incorrectly generating start/stop conditions on the bus. + Patch by Andrew Dyer, 26 Jul 2005 + * Fix bug in [id]cache_status commands for MPC85xx processors; should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. |