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authorWolfgang Denk <wd@pollux.denx.de>2006-03-13 00:46:05 +0100
committerWolfgang Denk <wd@pollux.denx.de>2006-03-13 00:46:05 +0100
commitb38dbd4622a2abeedf9fcb1806958d9afac0bbd4 (patch)
tree5141e4352c2db17593f8c30b0f19cb6ab3ba354d /CHANGELOG
parentf07217c9e2912af5b2f05d61829f62cc865b481f (diff)
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Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Patch by Murray Jensen, 19 Jul 2005
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Changes since U-Boot 1.1.4:
======================================================================
+* Fix bug in [id]cache_status commands for MPC85xx processors;
+ should look at LSB of L1CSRn registers to determine if L1 cache is
+ enabled, not the MSB.
+ Patch by Murray Jensen, 19 Jul 2005
+
* Fix array overflow with fw_setenv on uninitialised environment
Patch by Murray Jensen, 15 Jul 2005