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authorStefan Roese <sr@denx.de>2006-07-28 18:34:58 +0200
committerStefan Roese <sr@denx.de>2006-07-28 18:34:58 +0200
commita2c95a72247990dee9a03b26b4dc9fc0182c97ed (patch)
treecabdaa860480f895cccc6600f3454a751329c13c /CHANGELOG
parentfc6c4a67ae94adac02da6257a0f5adc3bd48ebec (diff)
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PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance
AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006
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Changes since U-Boot 1.1.4:
======================================================================
+* PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance
+ AMCC suggested to set the PMU bit to 0 for best performace on
+ the PPC440 DDR controller.
+ Please see doc/README.440-DDR-performance for details.
+ Patch by Stefan Roese, 28 Jul 2006
+
* AMCC bamboo (440EP) U-Boot image reduced to 384kbyte
Please see doc/README.bamboo for details.
Patch by Stefan Roese, 27 Jul 2006