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| author | Andreas Huber <andreas.huber@keymile.com> | 2011-01-25 11:26:15 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-04-11 22:41:37 +0200 |
| commit | 91a3c14cd0edb7cf427eb025ae25920c8546767c (patch) | |
| tree | 41bb688d771f22cf1d624ddce7ac9861f9c39536 | |
| parent | 086f09150d88a9bfe01b697900dcada6056d854f (diff) | |
| download | u-boot-imx-91a3c14cd0edb7cf427eb025ae25920c8546767c.zip u-boot-imx-91a3c14cd0edb7cf427eb025ae25920c8546767c.tar.gz u-boot-imx-91a3c14cd0edb7cf427eb025ae25920c8546767c.tar.bz2 | |
ppc, mgcoge: add DIP switch detection
This reads the DIP switch on mgcoge. The DIP switch is connected to
the BFTICU (0x40000089) FPGA. If the DIP switch is set the environment
variable 'actual_bank' is set to 0 and starts the SW in bank0.
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
| -rw-r--r-- | board/keymile/mgcoge/mgcoge.c | 18 | ||||
| -rw-r--r-- | include/configs/mgcoge.h | 5 |
2 files changed, 23 insertions, 0 deletions
diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c index 5c9496c..5dcdf37 100644 --- a/board/keymile/mgcoge/mgcoge.c +++ b/board/keymile/mgcoge/mgcoge.c @@ -293,6 +293,24 @@ int checkboard(void) return 0; } +#define DIPSWITCH_OFFSET 0x89 +#define DIPSWITCH_MASK 0x0f + +int last_stage_init(void) +{ + u8 dip_switch; + /* Dip switch */ + dip_switch = readb(CONFIG_SYS_BFTICU_BASE + DIPSWITCH_OFFSET); + dip_switch &= DIPSWITCH_MASK; + /* dip switch 'full reset' or 'db erase' */ + if (dip_switch & 0x1 || dip_switch & 0x2) { + /* start bootloader */ + puts("DIP: Enabled\n"); + setenv("actual_bank", "0"); + } + return 0; +} + /* * Early board initalization. */ diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index 6dec0ee..f1bd32a 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -348,4 +348,9 @@ #define OF_TBCLK (bd->bi_busfreq / 4) #define OF_STDOUT_PATH "/soc/cpm/serial@11a90" +/* enable last_stage_init */ +#define CONFIG_LAST_STAGE_INIT 1 +/* bfticu address */ +#define CONFIG_SYS_BFTICU_BASE 0x40000000 + #endif /* __CONFIG_H */ |