summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorStefano Babic <sbabic@denx.de>2010-03-29 15:56:10 +0200
committertrix <trix@windriver.com>2010-04-30 05:23:25 -0500
commitefb9591069ee276f7fa27a821240c7511f72fe65 (patch)
treeac7be414eb327c7a71847a9be01f8562c245955d
parent7d27cd08b4c1adfd58c54aaa8b8c8f4eeb3c7021 (diff)
downloadu-boot-imx-efb9591069ee276f7fa27a821240c7511f72fe65.zip
u-boot-imx-efb9591069ee276f7fa27a821240c7511f72fe65.tar.gz
u-boot-imx-efb9591069ee276f7fa27a821240c7511f72fe65.tar.bz2
MX31: add pin definitions for NAND controller
Add pin definitions ralted to the NAND controller to be used to set up the pin multiplexer. Signed-off-by: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/include/asm/arch-mx31/mx31-regs.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h
index 6f6e9a4..c59255e 100644
--- a/arch/arm/include/asm/arch-mx31/mx31-regs.h
+++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h
@@ -207,6 +207,15 @@ struct clock_control_regs {
#define MUX_CTL_CSPI1_SS0 0x8e
#define MUX_CTL_CSPI1_SS1 0x8f
+#define MUX_CTL_NFC_WP 0xD0
+#define MUX_CTL_NFC_CE 0xD1
+#define MUX_CTL_NFC_RB 0xD2
+#define MUX_CTL_NFC_WE 0xD4
+#define MUX_CTL_NFC_RE 0xD5
+#define MUX_CTL_NFC_ALE 0xD6
+#define MUX_CTL_NFC_CLE 0xD7
+
+
/*
* Helper macros for the MUX_[contact name]__[pin function] macros
*/