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| author | Wolfgang Denk <wd@denx.de> | 2010-04-28 00:10:41 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-04-28 00:10:41 +0200 |
| commit | 3699c28e6d16b563629c285311a0ce62a2c4c5d0 (patch) | |
| tree | c7fca6782a4563b56e713cac266a400e420a5b74 | |
| parent | d03f4230a6cc08ac718c876309e4dc425e1a9854 (diff) | |
| parent | 7c8cf0d0c7b12c7c63765e936cf760dc2c7d7306 (diff) | |
| download | u-boot-imx-3699c28e6d16b563629c285311a0ce62a2c4c5d0.zip u-boot-imx-3699c28e6d16b563629c285311a0ce62a2c4c5d0.tar.gz u-boot-imx-3699c28e6d16b563629c285311a0ce62a2c4c5d0.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-video
| -rw-r--r-- | drivers/video/mx3fb.c | 17 | ||||
| -rw-r--r-- | include/configs/qong.h | 11 |
2 files changed, 28 insertions, 0 deletions
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index 1e1d507..99a595e 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -56,6 +56,7 @@ void lcd_panel_disable(void) #define msleep(a) udelay(a * 1000) +#ifndef CONFIG_DISPLAY_VBEST_VGG322403 #define XRES 240 #define YRES 320 #define PANEL_TYPE IPU_PANEL_TFT @@ -70,6 +71,22 @@ void lcd_panel_disable(void) #define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL) #define IF_CONF 0 #define IF_CLK_DIV 0x175 +#else /* Display Vbest VGG322403 */ +#define XRES 320 +#define YRES 240 +#define PANEL_TYPE IPU_PANEL_TFT +#define PIXEL_CLK 156000 +#define PIXEL_FMT IPU_PIX_FMT_RGB666 +#define H_START_WIDTH 20 /* left_margin */ +#define H_SYNC_WIDTH 30 /* hsync_len */ +#define H_END_WIDTH (38 + 30) /* right_margin + hsync_len */ +#define V_START_WIDTH 7 /* upper_margin */ +#define V_SYNC_WIDTH 3 /* vsync_len */ +#define V_END_WIDTH (26 + 3) /* lower_margin + vsync_len */ +#define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL) +#define IF_CONF 0 +#define IF_CLK_DIV 0x175 +#endif #define LCD_COLOR_IPU LCD_COLOR16 diff --git a/include/configs/qong.h b/include/configs/qong.h index 64d0214..e41ea91 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -62,6 +62,17 @@ #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE) #define CONFIG_NET_MULTI 1 +/* Framebuffer and LCD */ +#define CONFIG_LCD +#define CONFIG_VIDEO_MX3 +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_DISPLAY_VBEST_VGG322403 + /* * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the * initial TFTP transfer, should the user wish one, significantly. |