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author | wdenk <wdenk> | 2005-05-09 10:17:32 +0000 |
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committer | wdenk <wdenk> | 2005-05-09 10:17:32 +0000 |
commit | ed16fefcbaf99a67a7dd7639898dbc896c70cb1b (patch) | |
tree | 588d9a44a35df45e937c09c8f8bd603f4c43efbe | |
parent | 931da93e0fced277c058c0c989d30bd1f6d10742 (diff) | |
download | u-boot-imx-ed16fefcbaf99a67a7dd7639898dbc896c70cb1b.zip u-boot-imx-ed16fefcbaf99a67a7dd7639898dbc896c70cb1b.tar.gz u-boot-imx-ed16fefcbaf99a67a7dd7639898dbc896c70cb1b.tar.bz2 |
On LWMON we must use the watchdog to reset the board as the CPU
genereated HRESET pulse is too short to reset the external circuitry.
-rw-r--r-- | CHANGELOG | 4 | ||||
-rw-r--r-- | Makefile | 3 | ||||
-rw-r--r-- | cpu/mpc8xx/cpu.c | 31 |
3 files changed, 37 insertions, 1 deletions
@@ -2,6 +2,10 @@ Changes for U-Boot 1.1.3: ====================================================================== +* On LWMON we must use the watchdog to reset the board as the CPU + genereated HRESET pulse is too short to reset the external + circuitry. + * Add test tool to exercise SDRAM accesses in burst mode (as standalone program, MPC8xx/PowerPC only) @@ -1651,7 +1651,8 @@ clean: | xargs rm -f rm -f examples/hello_world examples/timer \ examples/eepro100_eeprom examples/sched \ - examples/mem_to_mem_idma2intr examples/82559_eeprom + examples/mem_to_mem_idma2intr examples/82559_eeprom \ + examples/test_burst rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr rm -f tools/mpc86x_clk tools/ncb rm -f tools/easylogo/easylogo tools/bmp_logo diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index 5f92a37..4a32986 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -463,6 +463,8 @@ void upmconfig (uint upm, uint * table, uint size) /* ------------------------------------------------------------------------- */ +#ifndef CONFIG_LWMON + int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong msr, addr; @@ -497,6 +499,32 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 1; } +#else /* CONFIG_LWMON */ + +/* + * On the LWMON board, the MCLR reset input of the PIC's on the board + * uses a 47K/1n RC combination which has a 47us time constant. The + * low signal on the HRESET pin of the CPU is only 512 clocks = 8 us + * and thus too short to reset the external hardware. So we use the + * watchdog to reset the board. + */ +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + /* prevent triggering the watchdog */ + disable_interrupts (); + + /* make sure the watchdog is running */ + reset_8xx_watchdog ((immap_t *) CFG_IMMR); + + /* wait for watchdog reset */ + while (1) {}; + + /* NOTREACHED */ + return 1; +} + +#endif /* CONFIG_LWMON */ + /* ------------------------------------------------------------------------- */ /* @@ -558,6 +586,9 @@ void watchdog_reset (void) if (re_enable) enable_interrupts (); } +#endif /* CONFIG_WATCHDOG */ + +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_LWMON) void reset_8xx_watchdog (volatile immap_t * immr) { |