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| author | Kumar Gala <galak@kernel.crashing.org> | 2010-07-10 06:55:41 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-20 04:41:18 -0500 |
| commit | 85f8cda3c2013499df6ae9018b923a36cb57dbd9 (patch) | |
| tree | 4a03c27740618c141e789c6083d689135d06d34e | |
| parent | 1b942f7483faa647b81eccc87380c4b96a0c8d81 (diff) | |
| download | u-boot-imx-85f8cda3c2013499df6ae9018b923a36cb57dbd9.zip u-boot-imx-85f8cda3c2013499df6ae9018b923a36cb57dbd9.tar.gz u-boot-imx-85f8cda3c2013499df6ae9018b923a36cb57dbd9.tar.bz2 | |
powerpc/p4080: Add setting of clock-frequency for clockgen node
On QorIQ CoreNet based devices we have a global clocking block. We want
to keep track of SYSCLK frequency as it is what is used to derive all
other frequencies in the SoC
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/fdt.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index b4354f9..932466e 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -403,6 +403,11 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", bd->bi_brgfreq, 1); #endif +#ifdef CONFIG_FSL_CORENET + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", + "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); +#endif + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #ifdef CONFIG_MP |