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| author | York Sun <yorksun@freescale.com> | 2011-01-25 21:51:26 -0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-02-03 02:46:12 -0600 |
| commit | e1df0de4932e7296896709282feda2da3bd68a5e (patch) | |
| tree | 3d93348180085e0186e7327df8d8c06b52b0fc15 | |
| parent | 5103a03a0be2fd1a5270046d9f2bc77916e33a56 (diff) | |
| download | u-boot-imx-e1df0de4932e7296896709282feda2da3bd68a5e.zip u-boot-imx-e1df0de4932e7296896709282feda2da3bd68a5e.tar.gz u-boot-imx-e1df0de4932e7296896709282feda2da3bd68a5e.tar.bz2 | |
powerpc/85xx: Remove unnecessary polling loop from DDR init
This polling loop is not required normally, unless specifically stated in
workaround.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c index fa7e09f..b9502f7 100644 --- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c +++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c @@ -199,8 +199,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, temp_sdram_cfg = in_be32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI; out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN); asm volatile("sync;isync"); - while (!(in_be32(&ddr->debug[1]) & 0x2)) - ; /* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */ while (in_be32(&ddr->sdram_cfg_2) & 0x10) { |