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| author | Grzegorz Bernacki <gjb@semihalf.com> | 2009-06-12 11:33:55 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-06-14 23:06:03 +0200 |
| commit | 1260233982f7dfbdfd1adee12daa95a0c0e84a43 (patch) | |
| tree | 356ae81426b3dc35516b9dc386c6f9fe0ac3c552 | |
| parent | 12304871bc7839145f2b4238923e9023616d7399 (diff) | |
| download | u-boot-imx-1260233982f7dfbdfd1adee12daa95a0c0e84a43.zip u-boot-imx-1260233982f7dfbdfd1adee12daa95a0c0e84a43.tar.gz u-boot-imx-1260233982f7dfbdfd1adee12daa95a0c0e84a43.tar.bz2 | |
digsy mtc: Add description to GPIO initial configuration.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
| -rw-r--r-- | include/configs/digsy_mtc.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 0cc2a8d..558010f 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -248,6 +248,22 @@ /* * GPIO configuration + * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1) + * Bit 0 (mask 0x80000000) : 0x1 + * SPI on Tmr2/3/4/5 pins + * Bit 2:3 (mask 0x30000000) : 0x2 + * ATA cs0/1 on csb_4/5 + * Bit 6:7 (mask 0x03000000) : 0x2 + * Ethernet 100Mbit with MD + * Bits 12:15 (mask 0x000f0000): 0x5 + * USB - Two UARTs + * Bits 18:19 (mask 0x00003000) : 0x2 + * PSC3 - USB2 on PSC3 + * Bits 20:23 (mask 0x00000f00) : 0x1 + * PSC2 - CAN1&2 on PSC2 pins + * Bits 25:27 (mask 0x00000070) : 0x1 + * PSC1 - AC97 functionality + * Bits 29:31 (mask 0x00000007) : 0x2 */ #define CONFIG_SYS_GPS_PORT_CONFIG 0xA2552112 |