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| author | Marek Vasut <marek.vasut@gmail.com> | 2010-04-11 08:53:55 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut@gmail.com> | 2010-06-13 13:39:02 +0200 |
| commit | 3a96ad851f4f9267e1199b700cb838a77334e4b2 (patch) | |
| tree | b7a21918ab1ddb32359054b6975b62dade1b4904 | |
| parent | f986325dd569faeaec4186f678d113505c5c4828 (diff) | |
| download | u-boot-imx-3a96ad851f4f9267e1199b700cb838a77334e4b2.zip u-boot-imx-3a96ad851f4f9267e1199b700cb838a77334e4b2.tar.gz u-boot-imx-3a96ad851f4f9267e1199b700cb838a77334e4b2.tar.bz2 | |
PXA: Align stack to 8 bytes
Part of this patch is by: Mikhail Kshevetskiy.
Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD
instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour
is undefined.
The issue was observed when working with the NAND code, which was rendered
disfunctional. Also, the vsprintf() function had serious problems with printing
64bit wide long longs. After aligning the stack, this wrong behaviour is no
longer present.
Tested on:
Marvell Littleton PXA310 board
Toradex Colibri PXA320 board
Aeronix Zipit Z2 PXA270 handheld
Voipac PXA270 board
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| -rw-r--r-- | arch/arm/cpu/pxa/start.S | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 63ab0c5..3989fa6 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -140,7 +140,10 @@ stack_setup: #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif /* CONFIG_USE_IRQ */ - sub sp, r0, #12 /* leave 3 words for abort-stack */ + sub r0, r0, #12 /* leave 3 words for abort-stack */ + bic sp, r0, #7 /* NOTE: stack MUST be aligned to */ + /* 8 bytes in case we want to use */ + /* 64bit datatypes (eg. VSPRINTF64) */ clear_bss: ldr r0, _bss_start /* find start of bss segment */ |