diff options
author | Minkyu Kang <mk7.kang@samsung.com> | 2010-08-24 15:51:55 +0900 |
---|---|---|
committer | Minkyu Kang <mk7.kang@samsung.com> | 2010-08-30 14:44:16 +0900 |
commit | f70409aff3a10e22ff9c66f87e9cbc3de7cbd7f7 (patch) | |
tree | c8b7d4b4127f3d908b403d230940a9c122ed44e8 | |
parent | 545dabbeef56ffea33cedee56067edacd9fb90f0 (diff) | |
download | u-boot-imx-f70409aff3a10e22ff9c66f87e9cbc3de7cbd7f7.zip u-boot-imx-f70409aff3a10e22ff9c66f87e9cbc3de7cbd7f7.tar.gz u-boot-imx-f70409aff3a10e22ff9c66f87e9cbc3de7cbd7f7.tar.bz2 |
ARMV7: S5P: separate the peripheral clocks
Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
-rw-r--r-- | arch/arm/cpu/armv7/s5p-common/timer.c | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/clock.c | 25 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-s5pc1xx/clk.h | 3 | ||||
-rw-r--r-- | drivers/serial/serial_s5p.c | 4 |
4 files changed, 28 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 1f1c7ff..0490650 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -57,7 +57,7 @@ int timer_init(void) /* * @ PWM Timer 4 * Timer Freq(HZ) = - * PCLK / { (prescaler_value + 1) * (divider_value) } + * PWM_CLK / { (prescaler_value + 1) * (divider_value) } */ /* set prescaler : 16 */ @@ -68,7 +68,7 @@ int timer_init(void) if (count_value == 0) { /* reset initial value */ /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pclk() / ((PRESCALER_1 + 1) * + count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * (MUX_DIV_2 + 1)); /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ diff --git a/arch/arm/cpu/armv7/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c index c9b5485..98a27e5 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/clock.c +++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c @@ -38,7 +38,8 @@ #define CONFIG_SYS_CLK_FREQ_C110 24000000 #endif -unsigned long (*get_pclk)(void); +unsigned long (*get_uart_clk)(int dev_index); +unsigned long (*get_pwm_clk)(void); unsigned long (*get_arm_clk)(void); unsigned long (*get_pll_clk)(int); @@ -297,15 +298,33 @@ static unsigned long s5pc100_get_pclk(void) return get_pclkd1(); } +/* s5pc1xx: return uart clock frequency */ +static unsigned long s5pc1xx_get_uart_clk(int dev_index) +{ + if (cpu_is_s5pc110()) + return s5pc110_get_pclk(); + else + return s5pc100_get_pclk(); +} + +/* s5pc1xx: return pwm clock frequency */ +static unsigned long s5pc1xx_get_pwm_clk(void) +{ + if (cpu_is_s5pc110()) + return s5pc110_get_pclk(); + else + return s5pc100_get_pclk(); +} + void s5p_clock_init(void) { if (cpu_is_s5pc110()) { get_pll_clk = s5pc110_get_pll_clk; get_arm_clk = s5pc110_get_arm_clk; - get_pclk = s5pc110_get_pclk; } else { get_pll_clk = s5pc100_get_pll_clk; get_arm_clk = s5pc100_get_arm_clk; - get_pclk = s5pc100_get_pclk; } + get_uart_clk = s5pc1xx_get_uart_clk; + get_pwm_clk = s5pc1xx_get_pwm_clk; } diff --git a/arch/arm/include/asm/arch-s5pc1xx/clk.h b/arch/arm/include/asm/arch-s5pc1xx/clk.h index c25e17a..3488eb7 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/clk.h +++ b/arch/arm/include/asm/arch-s5pc1xx/clk.h @@ -33,6 +33,7 @@ void s5p_clock_init(void); extern unsigned long (*get_pll_clk)(int pllreg); extern unsigned long (*get_arm_clk)(void); -extern unsigned long (*get_pclk)(void); +extern unsigned long (*get_pwm_clk)(void); +extern unsigned long (*get_uart_clk)(int dev_index); #endif diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 6a61b4f..7709664 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -63,11 +63,11 @@ void serial_setbrg_dev(const int dev_index) { DECLARE_GLOBAL_DATA_PTR; struct s5p_uart *const uart = s5p_get_base_uart(dev_index); - u32 pclk = get_pclk(); + u32 uclk = get_uart_clk(dev_index); u32 baudrate = gd->baudrate; u32 val; - val = pclk / baudrate; + val = uclk / baudrate; writel(val / 16 - 1, &uart->ubrdiv); writew(udivslot[val % 16], &uart->udivslot); |