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author | Stefan Roese <sr@denx.de> | 2009-06-09 11:50:05 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-06-12 20:47:19 +0200 |
commit | 6bd55cc65d0c3aa84d719518254fb3c650239ed9 (patch) | |
tree | eaa4ba2ddadd0bfcfeca57cb36577f7b7971ad05 | |
parent | c60dc8527dbb2a1318c03bc18bdebcfbd0164551 (diff) | |
download | u-boot-imx-6bd55cc65d0c3aa84d719518254fb3c650239ed9.zip u-boot-imx-6bd55cc65d0c3aa84d719518254fb3c650239ed9.tar.gz u-boot-imx-6bd55cc65d0c3aa84d719518254fb3c650239ed9.tar.bz2 |
mcp512x: Add macros for SCFR LPC divisor access
Thos macros will be used by the esd mecp5123 board.
Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r-- | include/asm-ppc/immap_512x.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h index 444e028..3648a05 100644 --- a/include/asm-ppc/immap_512x.h +++ b/include/asm-ppc/immap_512x.h @@ -234,6 +234,9 @@ typedef struct clk512x { #define SCFR1_PCI_DIV_MASK 0x00700000 #define SCFR1_PCI_DIV_SHIFT 20 +#define SCFR1_LPC_DIV_MASK 0x00003800 +#define SCFR1_LPC_DIV_SHIFT 11 + /* SCFR2 System Clock Frequency Register 2 */ #define SCFR2_SYS_DIV 0xFC000000 #define SCFR2_SYS_DIV_SHIFT 26 |