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author | Matthias Fuchs <matthias.fuchs@esd.eu> | 2009-07-06 16:27:33 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2009-07-08 10:59:07 +0200 |
commit | 0580e48f53f972783e56fcedadb9ce6e5b0b6f32 (patch) | |
tree | 03d2679f174db82197dd4eddbd254ef7e184e1b5 | |
parent | 20b3c4b528606d51799aed5e4c71783720cd2b72 (diff) | |
download | u-boot-imx-0580e48f53f972783e56fcedadb9ce6e5b0b6f32.zip u-boot-imx-0580e48f53f972783e56fcedadb9ce6e5b0b6f32.tar.gz u-boot-imx-0580e48f53f972783e56fcedadb9ce6e5b0b6f32.tar.bz2 |
ppc4xx: Make pll_write global
This patch makes pll_write on PPC405EP boards
global and callable from C code.
pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.
board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r-- | cpu/ppc4xx/start.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index ac96fc2..582c781 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -2021,6 +2021,7 @@ pci_wait: ! Output r3 = none !----------------------------------------------------------------------------- */ + .globl pll_write pll_write: mfdcr r5, CPC0_UCR andis. r5,r5,0xFFFF |