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| author | Mike Frysinger <vapier@gentoo.org> | 2008-10-11 21:56:08 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-03-23 15:14:55 -0400 |
| commit | d347d572ab1f2d47bf257c9f7ca2e602038a136b (patch) | |
| tree | 4cc77c9926d360f1d16a4560813c48146b5483df | |
| parent | 0d4f24b70f7a979f58174f3eb271874950b551b6 (diff) | |
| download | u-boot-imx-d347d572ab1f2d47bf257c9f7ca2e602038a136b.zip u-boot-imx-d347d572ab1f2d47bf257c9f7ca2e602038a136b.tar.gz u-boot-imx-d347d572ab1f2d47bf257c9f7ca2e602038a136b.tar.bz2 | |
Blackfin: do not program voltage regulator on parts that do not have one
Some newer Blackfins (like the BF51x) do not have an on-chip voltage
regulator, so do not attempt to program the memory as if it does.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| -rw-r--r-- | cpu/blackfin/initcode.c | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c index 1352fd6..bbc2fa5 100644 --- a/cpu/blackfin/initcode.c +++ b/cpu/blackfin/initcode.c @@ -203,6 +203,15 @@ static inline void serial_putc(char c) # define CONFIG_VR_CTL_VAL (CONFIG_VR_CTL_CLKBUF | CONFIG_VR_CTL_VLEV | CONFIG_VR_CTL_FREQ) #endif +/* some parts do not have an on-chip voltage regulator */ +#if defined(__ADSPBF51x__) +# define CONFIG_HAS_VR 0 +# undef CONFIG_VR_CTL_VAL +# define CONFIG_VR_CTL_VAL 0 +#else +# define CONFIG_HAS_VR 1 +#endif + #ifndef EBIU_RSTCTL /* Blackfin with SDRAM */ #ifndef CONFIG_EBIU_SDBCTL_VAL @@ -302,15 +311,23 @@ void initcode(ADI_BOOT_DATA *bootstruct) serial_putc('S'); ADI_SYSCTRL_VALUES memory_settings; - memory_settings.uwVrCtl = CONFIG_VR_CTL_VAL; + uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT; + if (CONFIG_HAS_VR) { + actions |= SYSCTRL_VRCTL; + if (CONFIG_VR_CTL_VAL & FREQ_MASK) + actions |= SYSCTRL_INTVOLTAGE; + else + actions |= SYSCTRL_EXTVOLTAGE; + memory_settings.uwVrCtl = CONFIG_VR_CTL_VAL; + } else + actions |= SYSCTRL_EXTVOLTAGE; memory_settings.uwPllCtl = CONFIG_PLL_CTL_VAL; memory_settings.uwPllDiv = CONFIG_PLL_DIV_VAL; memory_settings.uwPllLockCnt = CONFIG_PLL_LOCKCNT_VAL; #if ANOMALY_05000432 bfin_write_SIC_IWR1(0); #endif - syscontrol(SYSCTRL_WRITE | SYSCTRL_VRCTL | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT | - (CONFIG_VR_CTL_VAL & FREQ_MASK ? SYSCTRL_INTVOLTAGE : SYSCTRL_EXTVOLTAGE), &memory_settings, NULL); + bfrom_SysControl(actions, &memory_settings, NULL); #if ANOMALY_05000432 bfin_write_SIC_IWR1(-1); #endif |