diff options
| author | Michal Simek <monstr@monstr.eu> | 2007-09-24 00:17:42 +0200 |
|---|---|---|
| committer | Michal Simek <monstr@monstr.eu> | 2007-09-24 00:17:42 +0200 |
| commit | 481d4328618804add1f818a6c96296121cd0528e (patch) | |
| tree | e1d2ab4fe41bce8306c5821acbdc2580769cc093 | |
| parent | b90c045f035c3cc9b5d2edaed6048dfb74e40763 (diff) | |
| download | u-boot-imx-481d4328618804add1f818a6c96296121cd0528e.zip u-boot-imx-481d4328618804add1f818a6c96296121cd0528e.tar.gz u-boot-imx-481d4328618804add1f818a6c96296121cd0528e.tar.bz2 | |
[FIX] repair MFSL commands
| -rw-r--r-- | common/cmd_mfsl.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 8d4c1a3..9d1d875 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -355,19 +355,18 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) unsigned int reg = 0; unsigned int val = 0; - reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); - val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 1) { + if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } + reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); + val = (unsigned int)simple_strtoul (argv[2], NULL, 16); switch (reg) { case 0x1: if (argc > 2) { MTS (val, rmsr); NOP; MFS (val, rmsr); - } else { MFS (val, rmsr); } @@ -382,6 +381,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: + puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -408,10 +408,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rmsr - read/write special purpose register\n", + "rspr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 0 - MSR - Machine status register\n" - " 1 - EAR - Exception address register\n" - " 2 - ESR - Exception status register\n"); + " 1 - MSR - Machine status register\n" + " 3 - EAR - Exception address register\n" + " 5 - ESR - Exception status register\n"); #endif |