summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorHugo Villeneuve <hugo.villeneuve@lyrtech.com>2008-11-21 14:35:56 -0500
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-02-22 13:42:25 +0100
commit0cd18fa982f9a8c1a90ce971379a7d6408976d48 (patch)
treecb6d1a39e0f8d2b4159970e0389e08b255925c5a
parentd3be1bcae7a8207e0a79ffd035d0e90f80378295 (diff)
downloadu-boot-imx-0cd18fa982f9a8c1a90ce971379a7d6408976d48.zip
u-boot-imx-0cd18fa982f9a8c1a90ce971379a7d6408976d48.tar.gz
u-boot-imx-0cd18fa982f9a8c1a90ce971379a7d6408976d48.tar.bz2
ARM DaVinci: Add common peripherals and modules enable functions.
Taken all the duplicated code for enabling common modules and apply software workarounds from the board specific code into common functions. Also added comments explaining the workarounds (from TI errata documents) and replaced some numerical bit numbers with more meaningful defines. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
-rw-r--r--board/davinci/common/psc.c65
-rw-r--r--board/davinci/common/psc.h3
-rw-r--r--board/davinci/dvevm/dvevm.c35
-rw-r--r--board/davinci/schmoogie/schmoogie.c37
-rw-r--r--board/davinci/sffsdr/sffsdr.c31
-rw-r--r--board/davinci/sonata/sonata.c35
6 files changed, 101 insertions, 105 deletions
diff --git a/board/davinci/common/psc.c b/board/davinci/common/psc.c
index d538d51..28e2a4b 100644
--- a/board/davinci/common/psc.c
+++ b/board/davinci/common/psc.c
@@ -26,6 +26,14 @@
#include <common.h>
#include <asm/arch/hardware.h>
+#define PINMUX0_EMACEN (1 << 31)
+#define PINMUX0_AECS5 (1 << 11)
+#define PINMUX0_AECS4 (1 << 10)
+
+#define PINMUX1_I2C (1 << 7)
+#define PINMUX1_UART1 (1 << 1)
+#define PINMUX1_UART0 (1 << 0)
+
/*
* The DM6446 includes two separate power domains: "Always On" and "DSP". The
* "Always On" power domain is always on when the chip is on. The "Always On"
@@ -115,3 +123,60 @@ void dsp_on(void)
REG(PSC_GBLCTL) &= ~0x1f;
}
#endif /* CONFIG_SYS_USE_DSPLINK */
+
+void davinci_enable_uart0(void)
+{
+ lpsc_on(DAVINCI_LPSC_UART0);
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= PINMUX1_UART0;
+}
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+void davinci_enable_emac(void)
+{
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable EMAC. */
+ REG(PINMUX0) |= PINMUX0_EMACEN;
+}
+#endif
+
+void davinci_enable_i2c(void)
+{
+ lpsc_on(DAVINCI_LPSC_I2C);
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= PINMUX1_I2C;
+}
+
+void davinci_errata_workarounds(void)
+{
+ /*
+ * Workaround for TMS320DM6446 errata 1.3.22:
+ * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset
+ * Revision(s) Affected: 1.3 and earlier
+ */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /*
+ * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR)
+ * as suggested in TMS320DM6446 errata 2.1.2:
+ *
+ * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions
+ * low priority modules can occupy the bus and prevent high priority
+ * modules like the VPSS from getting the required DDR2 throughput.
+ * A hex value of 0x20 should provide a good ARM (cache enabled)
+ * performance and still allow good utilization by the VPSS or other
+ * modules.
+ */
+ REG(VBPR) = 0x20;
+}
diff --git a/board/davinci/common/psc.h b/board/davinci/common/psc.h
index 6ab2575..b18a185 100644
--- a/board/davinci/common/psc.h
+++ b/board/davinci/common/psc.h
@@ -24,5 +24,8 @@
void lpsc_on(unsigned int id);
void dsp_on(void);
+void davinci_enable_uart0(void);
+void davinci_enable_emac(void);
+void davinci_enable_i2c(void);
#endif /* __PSC_H */
diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c
index 3fe8858..22308de 100644
--- a/board/davinci/dvevm/dvevm.c
+++ b/board/davinci/dvevm/dvevm.c
@@ -27,7 +27,6 @@
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -41,16 +40,13 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ /* Configure AEMIF pins (although this should be configured at boot time
+ * with pull-up/pull-down resistors) */
+ REG(PINMUX0) = 0x00000c1f;
+
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
lpsc_on(DAVINCI_LPSC_USB);
@@ -59,24 +55,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
diff --git a/board/davinci/schmoogie/schmoogie.c b/board/davinci/schmoogie/schmoogie.c
index 3504a2e..433769a 100644
--- a/board/davinci/schmoogie/schmoogie.c
+++ b/board/davinci/schmoogie/schmoogie.c
@@ -27,7 +27,6 @@
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -41,16 +40,13 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ /* Configure AEMIF pins (although this should be configured at boot time
+ * with pull-up/pull-down resistors) */
+ REG(PINMUX0) = 0x00000c1f;
+
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
#if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -58,24 +54,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
@@ -87,7 +70,7 @@ int misc_init_r(void)
int i = 0;
/* Set serial number from UID chip */
- u_int8_t crc_tbl[256] = {
+ const u_int8_t crc_tbl[256] = {
0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83,
0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41,
0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e,
diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
index 9296d7b..e76f86d 100644
--- a/board/davinci/sffsdr/sffsdr.c
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -30,7 +30,6 @@
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -51,16 +50,9 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
#if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -68,24 +60,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);
diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c
index 6de9356..d56b443 100644
--- a/board/davinci/sonata/sonata.c
+++ b/board/davinci/sonata/sonata.c
@@ -26,7 +26,6 @@
#include <common.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
#include "../common/psc.h"
#include "../common/misc.h"
@@ -40,16 +39,13 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
- /* Workaround for TMS320DM6446 errata 1.3.22 */
- REG(PSC_SILVER_BULLET) = 0;
+ /* Configure AEMIF pins (although this should be configured at boot time
+ * with pull-up/pull-down resistors) */
+ REG(PINMUX0) = 0x00000c1f;
+
+ davinci_errata_workarounds();
/* Power on required peripherals */
- lpsc_on(DAVINCI_LPSC_EMAC);
- lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
- lpsc_on(DAVINCI_LPSC_MDIO);
- lpsc_on(DAVINCI_LPSC_I2C);
- lpsc_on(DAVINCI_LPSC_UART0);
- lpsc_on(DAVINCI_LPSC_TIMER1);
lpsc_on(DAVINCI_LPSC_GPIO);
#if !defined(CONFIG_SYS_USE_DSPLINK)
@@ -57,24 +53,11 @@ int board_init(void)
dsp_on();
#endif /* CONFIG_SYS_USE_DSPLINK */
- /* Bringup UART0 out of reset */
- REG(UART0_PWREMU_MGMT) = 0x0000e003;
-
- /* Enable GIO3.3V cells used for EMAC */
- REG(VDD3P3V_PWDN) = 0;
-
- /* Enable UART0 MUX lines */
- REG(PINMUX1) |= 1;
-
- /* Enable EMAC and AEMIF pins */
- REG(PINMUX0) = 0x80000c1f;
-
- /* Enable I2C pin Mux */
- REG(PINMUX1) |= (1 << 7);
-
- /* Set the Bus Priority Register to appropriate value */
- REG(VBPR) = 0x20;
+ davinci_enable_uart0();
+ davinci_enable_emac();
+ davinci_enable_i2c();
+ lpsc_on(DAVINCI_LPSC_TIMER1);
timer_init();
return(0);