MLK-12996 imx: mx6dqp/dq: Fix SATA read/write fail after booting from SATA

We found a issue in PLL6 ENET that changing the bit[1:0] DIV_SELECT for ENET
ref clock will impact the SATA ref 100Mhz clock.  If SATA is initialized before
this changing, SATA read/write can't work after it. And we have to re-init SATA.

The issue can reproduce on both i.MX6DQP and i.MX6DQ. IC investigation is ongoing.

This patch is an work around that moves the ENET clock setting
(enable_fec_anatop_clock) from ethernet init to board_init which is prior
than SATA initialization. So there is no PLL6 change after SATA init.

Signed-off-by: Ye Li <ye.li@nxp.com>

2 files changed, 14 insertions, 4 deletions

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 8035c40..218b73d 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -476,13 +476,11 @@ static void setup_fec(void)
 	ret = enable_fec_anatop_clock(0, ENET_125MHZ);
 	if (ret)
 		printf("Error fec anatop clock settings!\n");
-
-	setup_iomux_enet();
 }
 
 int board_eth_init(bd_t *bis)
 {
-	setup_fec();
+	setup_iomux_enet();
 
 	return cpu_eth_init(bis);
 }
@@ -724,6 +722,11 @@ int board_init(void)
 #ifdef CONFIG_SYS_USE_EIMNOR
 	setup_iomux_eimnor();
 #endif
+
+#ifdef CONFIG_FEC_MXC
+	setup_fec();
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 527092e..6483f9f 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -803,7 +803,7 @@ int overwrite_console(void)
 	return 1;
 }
 
-int board_eth_init(bd_t *bis)
+static void setup_fec(void)
 {
 	if (is_mx6dqp()) {
 		int ret;
@@ -814,7 +814,10 @@ int board_eth_init(bd_t *bis)
 		if (ret)
 		    printf("Error fec anatop clock settings!\n");
 	}
+}
 
+int board_eth_init(bd_t *bis)
+{
 	setup_iomux_enet();
 	setup_pcie();
 
@@ -916,6 +919,10 @@ int board_init(void)
 	setup_sata();
 #endif
 
+#ifdef CONFIG_FEC_MXC
+	setup_fec();
+#endif
+
 	return 0;
 }