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| author | York Sun <yorksun@freescale.com> | 2015-08-03 12:02:05 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-06 07:31:13 -0600 |
| commit | fdb9f349be255b9b69a5e1a300296779b48a36b0 (patch) | |
| tree | d23f5e9c6bd54398d2be645821e89c8a1f2cf99e | |
| parent | d1de41d7fa68b29510da1320d6646fcc19113af2 (diff) | |
| download | u-boot-imx-fdb9f349be255b9b69a5e1a300296779b48a36b0.zip u-boot-imx-fdb9f349be255b9b69a5e1a300296779b48a36b0.tar.gz u-boot-imx-fdb9f349be255b9b69a5e1a300296779b48a36b0.tar.bz2 | |
lib/fdtdec: Fix compiling warning caused by changing fdt_addr_t type
fdt_addr_t is changed to phys_addr_t. The format in debug should be updated
to %pa to match the type.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | drivers/pci/pci_tegra.c | 10 | ||||
| -rw-r--r-- | drivers/spi/fsl_dspi.c | 4 | ||||
| -rw-r--r-- | drivers/video/tegra.c | 2 |
3 files changed, 8 insertions, 8 deletions
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index 67b5fdf..ebb959f 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -445,11 +445,11 @@ static int tegra_pcie_parse_dt_ranges(const void *fdt, int node, } debug("PCI regions:\n"); - debug(" I/O: %#x-%#x\n", pcie->io.start, pcie->io.end); - debug(" non-prefetchable memory: %#x-%#x\n", pcie->mem.start, - pcie->mem.end); - debug(" prefetchable memory: %#x-%#x\n", pcie->prefetch.start, - pcie->prefetch.end); + debug(" I/O: %pa-%pa\n", &pcie->io.start, &pcie->io.end); + debug(" non-prefetchable memory: %pa-%pa\n", &pcie->mem.start, + &pcie->mem.end); + debug(" prefetchable memory: %pa-%pa\n", &pcie->prefetch.start, + &pcie->prefetch.end); return 0; } diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index 7928531..3881b2e 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -664,8 +664,8 @@ static int fsl_dspi_ofdata_to_platdata(struct udevice *bus) plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency", FSL_DSPI_DEFAULT_SCK_FREQ); - debug("DSPI: regs=0x%llx, max-frequency=%d, endianess=%s, num-cs=%d\n", - (u64)plat->regs_addr, plat->speed_hz, + debug("DSPI: regs=%pa, max-frequency=%d, endianess=%s, num-cs=%d\n", + &plat->regs_addr, plat->speed_hz, plat->flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le", plat->num_chipselect); diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c index b8f3431..33c6103 100644 --- a/drivers/video/tegra.c +++ b/drivers/video/tegra.c @@ -92,7 +92,7 @@ void lcd_ctrl_init(void *lcdbase) /* Enable flushing after LCD writes if requested */ lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH); - debug("LCD frame buffer at %08X\n", disp_config->frame_buffer); + debug("LCD frame buffer at %pa\n", &disp_config->frame_buffer); } ulong calc_fbsize(void) |