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authorMichal Simek <michal.simek@xilinx.com>2015-12-09 14:36:31 +0100
committerMichal Simek <michal.simek@xilinx.com>2016-01-27 15:55:50 +0100
commitf36bbcceba2891bec17add339c7ff3241c3f6d94 (patch)
tree97ece34403ff4a67fb3947f0eba801f97e736a75
parent2652a6219f975d47cc295f1e060fa54da84d761b (diff)
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net: axi_emac: Pass directly pointer to register space
Simplify mdio_wait function by passing regs directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
-rw-r--r--drivers/net/xilinx_axi_emac.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index f088230..071e0a8 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -147,9 +147,8 @@ struct axi_regs {
*/
#define PHY_DETECT_MASK 0x1808
-static inline int mdio_wait(struct eth_device *dev)
+static inline int mdio_wait(struct axi_regs *regs)
{
- struct axi_regs *regs = (struct axi_regs *)dev->iobase;
u32 timeout = 200;
/* Wait till MDIO interface is ready to accept a new transaction. */
@@ -171,7 +170,7 @@ static u32 phyread(struct eth_device *dev, u32 phyaddress, u32 registernum,
struct axi_regs *regs = (struct axi_regs *)dev->iobase;
u32 mdioctrlreg = 0;
- if (mdio_wait(dev))
+ if (mdio_wait(regs))
return 1;
mdioctrlreg = ((phyaddress << XAE_MDIO_MCR_PHYAD_SHIFT) &
@@ -183,7 +182,7 @@ static u32 phyread(struct eth_device *dev, u32 phyaddress, u32 registernum,
out_be32(&regs->mdio_mcr, mdioctrlreg);
- if (mdio_wait(dev))
+ if (mdio_wait(regs))
return 1;
/* Read data */
@@ -197,7 +196,7 @@ static u32 phywrite(struct eth_device *dev, u32 phyaddress, u32 registernum,
struct axi_regs *regs = (struct axi_regs *)dev->iobase;
u32 mdioctrlreg = 0;
- if (mdio_wait(dev))
+ if (mdio_wait(regs))
return 1;
mdioctrlreg = ((phyaddress << XAE_MDIO_MCR_PHYAD_SHIFT) &
@@ -212,7 +211,7 @@ static u32 phywrite(struct eth_device *dev, u32 phyaddress, u32 registernum,
out_be32(&regs->mdio_mcr, mdioctrlreg);
- if (mdio_wait(dev))
+ if (mdio_wait(regs))
return 1;
return 0;