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| author | Stefan Roese <sr@denx.de> | 2015-12-14 12:31:48 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2016-01-14 14:08:59 +0100 |
| commit | f0e8173a381a947e7a7d2078a50f6b5a6fc6d8c8 (patch) | |
| tree | a1c0a92d8857b923d773e2e16f0a4e0866379870 | |
| parent | 3e5ce7ceeb940926518378ff31913b263d41c354 (diff) | |
| download | u-boot-imx-f0e8173a381a947e7a7d2078a50f6b5a6fc6d8c8.zip u-boot-imx-f0e8173a381a947e7a7d2078a50f6b5a6fc6d8c8.tar.gz u-boot-imx-f0e8173a381a947e7a7d2078a50f6b5a6fc6d8c8.tar.bz2 | |
arm: mvebu: Add v7_outer_cache_disable function for AXP & A38x
Add functionality to correctly disable the L2 cache on the Armada XP
and 38x platforms.
Without this, booting into Linux on ClearFog (A38x) results in a hangup
without any output on the serial console at all. Even with earlyprintk
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
| -rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 74087e2..fd56c99 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -422,3 +422,11 @@ void v7_outer_cache_enable(void) setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); } } + +void v7_outer_cache_disable(void) +{ + struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; + + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); +} |