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authorAsh Charles <ashcharles@gmail.com>2016-10-21 17:31:33 -0400
committerJoe Hershberger <joe.hershberger@ni.com>2016-11-07 11:28:16 -0600
commitf018545ef756c4bc567d1bbf153615833bc590b0 (patch)
treece2e1fa7dcdb899a5f11c439d38d8e43fac2e5c0
parent21622452f2eb735a5cfe8697edc3c166a71b8485 (diff)
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net: phy: micrel: center FLP burst timing at 16ms
Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms specified by the IEEE802.3 standard from the chip's default of 8ms. For more details, see the "Auto-Negotiation Timing" section of the KSZ9031RNX datasheet. [1] https://patchwork.kernel.org/patch/6558371/ Signed-off-by: Ash Charles <ash.charles@savoirfairelinux.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
-rw-r--r--drivers/net/phy/micrel.c23
-rw-r--r--include/micrel.h3
2 files changed, 26 insertions, 0 deletions
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 6b313a9..28a1401 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -415,11 +415,31 @@ static int ksz9031_of_config(struct phy_device *phydev)
return 0;
}
+
+static int ksz9031_center_flp_timing(struct phy_device *phydev)
+{
+ struct phy_driver *drv = phydev->drv;
+ int ret = 0;
+
+ if (!drv || !drv->writeext)
+ return -EOPNOTSUPP;
+
+ ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_LO, 0x1A80);
+ if (ret)
+ return ret;
+
+ ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_HI, 0x6);
+ return ret;
+}
#else
static int ksz9031_of_config(struct phy_device *phydev)
{
return 0;
}
+static int ksz9031_center_flp_timing(struct phy_device *phydev)
+{
+ return 0;
+}
#endif
/* Accessors to extended registers*/
@@ -472,6 +492,9 @@ static int ksz9031_config(struct phy_device *phydev)
ret = ksz9031_of_config(phydev);
if (ret)
return ret;
+ ret = ksz9031_center_flp_timing(phydev);
+ if (ret)
+ return ret;
return genphy_config(phydev);
}
diff --git a/include/micrel.h b/include/micrel.h
index e6d145d..3e6b531 100644
--- a/include/micrel.h
+++ b/include/micrel.h
@@ -20,6 +20,9 @@
#define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW 0x6
#define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW 0x8
+#define MII_KSZ9031_FLP_BURST_TX_LO 0x3
+#define MII_KSZ9031_FLP_BURST_TX_HI 0x4
+
/* Registers */
#define MMD_ACCESS_CONTROL 0xd
#define MMD_ACCESS_REG_DATA 0xe