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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-05-30 03:19:32 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-06-10 08:43:10 -0400 |
| commit | e9d6cd042d63d59a43dfe953d488cfbf1ece516c (patch) | |
| tree | 5bc4fa681223c3cea48b4df9b413b367d8443faa | |
| parent | 18c9d55ac611784d161440bb9f127e372e132856 (diff) | |
| download | u-boot-imx-e9d6cd042d63d59a43dfe953d488cfbf1ece516c.zip u-boot-imx-e9d6cd042d63d59a43dfe953d488cfbf1ece516c.tar.gz u-boot-imx-e9d6cd042d63d59a43dfe953d488cfbf1ece516c.tar.bz2 | |
ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc's
Slew rate compensation cells are not present for DRA7xx
Soc's. So return from function srcomp_enable() if soc is not
OMAP54xx.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/hwinit.c | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 8 |
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index afb7000..40dbf45 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -201,6 +201,9 @@ void srcomp_enable(void) u32 sysclk_ind = get_sys_clk_index(); u32 omap_rev = omap_revision(); + if (!is_omap54xx()) + return; + mul_factor = srcomp_parameters[sysclk_ind].multiply_factor; div_factor = srcomp_parameters[sysclk_ind].divide_factor; diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index f51fccc..f33f28b 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -597,6 +597,14 @@ static inline u32 omap_revision(void) extern u32 *const omap_si_rev; return *omap_si_rev; } + +#define OMAP54xx 0x54000000 + +static inline u8 is_omap54xx(void) +{ + extern u32 *const omap_si_rev; + return ((*omap_si_rev & 0xFF000000) == OMAP54xx); +} #endif /* |