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| author | Tom Rini <trini@konsulko.com> | 2015-08-04 12:21:45 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-04 12:21:45 -0400 |
| commit | e22b1a54942d9003b10564325a34e3cf767556ce (patch) | |
| tree | f244c37d0c1089b7e1858829e275be47f6f48ede | |
| parent | 8889e984154f749047dc9ed3b4cd8b734dde66f2 (diff) | |
| parent | e16b604ecf5701cc0ab4437bccfd65468035740b (diff) | |
| download | u-boot-imx-e22b1a54942d9003b10564325a34e3cf767556ce.zip u-boot-imx-e22b1a54942d9003b10564325a34e3cf767556ce.tar.gz u-boot-imx-e22b1a54942d9003b10564325a34e3cf767556ce.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
34 files changed, 1185 insertions, 432 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 75f0d8c..8dd95d9 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -344,5 +344,13 @@ void smp_kick_all_cpus(void) struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); out_be32(&gur->brrl, 0x2); + + /* + * LS1 STANDBYWFE is not captured outside the ARM module in the soc. + * So add a delay to wait bootrom execute WFE. + */ + udelay(1); + + asm volatile("sev"); } #endif diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index 8675e91..a4576dd 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -10,6 +10,7 @@ #include <fsl_ddrc_version.h> #define CONFIG_SYS_PAGE_SIZE 0x10000 +#define CONFIG_SYS_CACHELINE_SIZE 64 #ifndef L1_CACHE_BYTES #define L1_CACHE_SHIFT 6 @@ -63,6 +64,9 @@ #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) #define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000) +#define CONFIG_SYS_LS2085A_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_LS2085A_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000) + /* TZ Protection Controller Definitions */ #define TZPC_BASE 0x02200000 #define TZPCR0SIZE_BASE (TZPC_BASE) diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index ce5cb52..d6ef6ba 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -54,6 +54,92 @@ enum { GE1_CLK125, }; +#ifdef CONFIG_LS102XA_NS_ACCESS +static struct csu_ns_dev ns_dev[] = { + { CSU_CSLX_PCIE2_IO, CSU_ALL_RW }, + { CSU_CSLX_PCIE1_IO, CSU_ALL_RW }, + { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW }, + { CSU_CSLX_IFC_MEM, CSU_ALL_RW }, + { CSU_CSLX_OCRAM, CSU_ALL_RW }, + { CSU_CSLX_GIC, CSU_ALL_RW }, + { CSU_CSLX_PCIE1, CSU_ALL_RW }, + { CSU_CSLX_OCRAM2, CSU_ALL_RW }, + { CSU_CSLX_QSPI_MEM, CSU_ALL_RW }, + { CSU_CSLX_PCIE2, CSU_ALL_RW }, + { CSU_CSLX_SATA, CSU_ALL_RW }, + { CSU_CSLX_USB3, CSU_ALL_RW }, + { CSU_CSLX_SERDES, CSU_ALL_RW }, + { CSU_CSLX_QDMA, CSU_ALL_RW }, + { CSU_CSLX_LPUART2, CSU_ALL_RW }, + { CSU_CSLX_LPUART1, CSU_ALL_RW }, + { CSU_CSLX_LPUART4, CSU_ALL_RW }, + { CSU_CSLX_LPUART3, CSU_ALL_RW }, + { CSU_CSLX_LPUART6, CSU_ALL_RW }, + { CSU_CSLX_LPUART5, CSU_ALL_RW }, + { CSU_CSLX_DSPI2, CSU_ALL_RW }, + { CSU_CSLX_DSPI1, CSU_ALL_RW }, + { CSU_CSLX_QSPI, CSU_ALL_RW }, + { CSU_CSLX_ESDHC, CSU_ALL_RW }, + { CSU_CSLX_2D_ACE, CSU_ALL_RW }, + { CSU_CSLX_IFC, CSU_ALL_RW }, + { CSU_CSLX_I2C1, CSU_ALL_RW }, + { CSU_CSLX_USB2, CSU_ALL_RW }, + { CSU_CSLX_I2C3, CSU_ALL_RW }, + { CSU_CSLX_I2C2, CSU_ALL_RW }, + { CSU_CSLX_DUART2, CSU_ALL_RW }, + { CSU_CSLX_DUART1, CSU_ALL_RW }, + { CSU_CSLX_WDT2, CSU_ALL_RW }, + { CSU_CSLX_WDT1, CSU_ALL_RW }, + { CSU_CSLX_EDMA, CSU_ALL_RW }, + { CSU_CSLX_SYS_CNT, CSU_ALL_RW }, + { CSU_CSLX_DMA_MUX2, CSU_ALL_RW }, + { CSU_CSLX_DMA_MUX1, CSU_ALL_RW }, + { CSU_CSLX_DDR, CSU_ALL_RW }, + { CSU_CSLX_QUICC, CSU_ALL_RW }, + { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW }, + { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW }, + { CSU_CSLX_SFP, CSU_ALL_RW }, + { CSU_CSLX_TMU, CSU_ALL_RW }, + { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW }, + { CSU_CSLX_RESERVED0, CSU_ALL_RW }, + { CSU_CSLX_ETSEC1, CSU_ALL_RW }, + { CSU_CSLX_SEC5_5, CSU_ALL_RW }, + { CSU_CSLX_ETSEC3, CSU_ALL_RW }, + { CSU_CSLX_ETSEC2, CSU_ALL_RW }, + { CSU_CSLX_GPIO2, CSU_ALL_RW }, + { CSU_CSLX_GPIO1, CSU_ALL_RW }, + { CSU_CSLX_GPIO4, CSU_ALL_RW }, + { CSU_CSLX_GPIO3, CSU_ALL_RW }, + { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW }, + { CSU_CSLX_CSU, CSU_ALL_RW }, + { CSU_CSLX_ASRC, CSU_ALL_RW }, + { CSU_CSLX_SPDIF, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN2, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN1, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN4, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN3, CSU_ALL_RW }, + { CSU_CSLX_SAI2, CSU_ALL_RW }, + { CSU_CSLX_SAI1, CSU_ALL_RW }, + { CSU_CSLX_SAI4, CSU_ALL_RW }, + { CSU_CSLX_SAI3, CSU_ALL_RW }, + { CSU_CSLX_FTM2, CSU_ALL_RW }, + { CSU_CSLX_FTM1, CSU_ALL_RW }, + { CSU_CSLX_FTM4, CSU_ALL_RW }, + { CSU_CSLX_FTM3, CSU_ALL_RW }, + { CSU_CSLX_FTM6, CSU_ALL_RW }, + { CSU_CSLX_FTM5, CSU_ALL_RW }, + { CSU_CSLX_FTM8, CSU_ALL_RW }, + { CSU_CSLX_FTM7, CSU_ALL_RW }, + { CSU_CSLX_COP_DCSR, CSU_ALL_RW }, + { CSU_CSLX_EPU, CSU_ALL_RW }, + { CSU_CSLX_GDI, CSU_ALL_RW }, + { CSU_CSLX_DDI, CSU_ALL_RW }, + { CSU_CSLX_RESERVED1, CSU_ALL_RW }, + { CSU_CSLX_USB3_PHY, CSU_ALL_RW }, + { CSU_CSLX_RESERVED2, CSU_ALL_RW }, +}; +#endif + int checkboard(void) { #ifndef CONFIG_QSPI_BOOT @@ -292,6 +378,12 @@ void board_init_f(ulong dummy) dram_init(); + /* Allow OCRAM access permission as R/W */ +#ifdef CONFIG_LS102XA_NS_ACCESS + enable_devices_ns_access(&ns_dev[4], 1); + enable_devices_ns_access(&ns_dev[7], 1); +#endif + board_init_r(NULL, 0); } #endif @@ -444,92 +536,6 @@ int misc_init_r(void) return 0; } -#ifdef CONFIG_LS102XA_NS_ACCESS -static struct csu_ns_dev ns_dev[] = { - { CSU_CSLX_PCIE2_IO, CSU_ALL_RW }, - { CSU_CSLX_PCIE1_IO, CSU_ALL_RW }, - { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW }, - { CSU_CSLX_IFC_MEM, CSU_ALL_RW }, - { CSU_CSLX_OCRAM, CSU_ALL_RW }, - { CSU_CSLX_GIC, CSU_ALL_RW }, - { CSU_CSLX_PCIE1, CSU_ALL_RW }, - { CSU_CSLX_OCRAM2, CSU_ALL_RW }, - { CSU_CSLX_QSPI_MEM, CSU_ALL_RW }, - { CSU_CSLX_PCIE2, CSU_ALL_RW }, - { CSU_CSLX_SATA, CSU_ALL_RW }, - { CSU_CSLX_USB3, CSU_ALL_RW }, - { CSU_CSLX_SERDES, CSU_ALL_RW }, - { CSU_CSLX_QDMA, CSU_ALL_RW }, - { CSU_CSLX_LPUART2, CSU_ALL_RW }, - { CSU_CSLX_LPUART1, CSU_ALL_RW }, - { CSU_CSLX_LPUART4, CSU_ALL_RW }, - { CSU_CSLX_LPUART3, CSU_ALL_RW }, - { CSU_CSLX_LPUART6, CSU_ALL_RW }, - { CSU_CSLX_LPUART5, CSU_ALL_RW }, - { CSU_CSLX_DSPI2, CSU_ALL_RW }, - { CSU_CSLX_DSPI1, CSU_ALL_RW }, - { CSU_CSLX_QSPI, CSU_ALL_RW }, - { CSU_CSLX_ESDHC, CSU_ALL_RW }, - { CSU_CSLX_2D_ACE, CSU_ALL_RW }, - { CSU_CSLX_IFC, CSU_ALL_RW }, - { CSU_CSLX_I2C1, CSU_ALL_RW }, - { CSU_CSLX_USB2, CSU_ALL_RW }, - { CSU_CSLX_I2C3, CSU_ALL_RW }, - { CSU_CSLX_I2C2, CSU_ALL_RW }, - { CSU_CSLX_DUART2, CSU_ALL_RW }, - { CSU_CSLX_DUART1, CSU_ALL_RW }, - { CSU_CSLX_WDT2, CSU_ALL_RW }, - { CSU_CSLX_WDT1, CSU_ALL_RW }, - { CSU_CSLX_EDMA, CSU_ALL_RW }, - { CSU_CSLX_SYS_CNT, CSU_ALL_RW }, - { CSU_CSLX_DMA_MUX2, CSU_ALL_RW }, - { CSU_CSLX_DMA_MUX1, CSU_ALL_RW }, - { CSU_CSLX_DDR, CSU_ALL_RW }, - { CSU_CSLX_QUICC, CSU_ALL_RW }, - { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW }, - { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW }, - { CSU_CSLX_SFP, CSU_ALL_RW }, - { CSU_CSLX_TMU, CSU_ALL_RW }, - { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW }, - { CSU_CSLX_RESERVED0, CSU_ALL_RW }, - { CSU_CSLX_ETSEC1, CSU_ALL_RW }, - { CSU_CSLX_SEC5_5, CSU_ALL_RW }, - { CSU_CSLX_ETSEC3, CSU_ALL_RW }, - { CSU_CSLX_ETSEC2, CSU_ALL_RW }, - { CSU_CSLX_GPIO2, CSU_ALL_RW }, - { CSU_CSLX_GPIO1, CSU_ALL_RW }, - { CSU_CSLX_GPIO4, CSU_ALL_RW }, - { CSU_CSLX_GPIO3, CSU_ALL_RW }, - { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW }, - { CSU_CSLX_CSU, CSU_ALL_RW }, - { CSU_CSLX_ASRC, CSU_ALL_RW }, - { CSU_CSLX_SPDIF, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN2, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN1, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN4, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN3, CSU_ALL_RW }, - { CSU_CSLX_SAI2, CSU_ALL_RW }, - { CSU_CSLX_SAI1, CSU_ALL_RW }, - { CSU_CSLX_SAI4, CSU_ALL_RW }, - { CSU_CSLX_SAI3, CSU_ALL_RW }, - { CSU_CSLX_FTM2, CSU_ALL_RW }, - { CSU_CSLX_FTM1, CSU_ALL_RW }, - { CSU_CSLX_FTM4, CSU_ALL_RW }, - { CSU_CSLX_FTM3, CSU_ALL_RW }, - { CSU_CSLX_FTM6, CSU_ALL_RW }, - { CSU_CSLX_FTM5, CSU_ALL_RW }, - { CSU_CSLX_FTM8, CSU_ALL_RW }, - { CSU_CSLX_FTM7, CSU_ALL_RW }, - { CSU_CSLX_COP_DCSR, CSU_ALL_RW }, - { CSU_CSLX_EPU, CSU_ALL_RW }, - { CSU_CSLX_GDI, CSU_ALL_RW }, - { CSU_CSLX_DDI, CSU_ALL_RW }, - { CSU_CSLX_RESERVED1, CSU_ALL_RW }, - { CSU_CSLX_USB3_PHY, CSU_ALL_RW }, - { CSU_CSLX_RESERVED2, CSU_ALL_RW }, -}; -#endif - struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10), diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 8fef8e9..b7458a9 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -22,6 +22,7 @@ #include <tsec.h> #include <fsl_sec.h> #include <spl.h> +#include "../common/sleep.h" #ifdef CONFIG_U_QE #include "../../../drivers/qe/qe.h" #endif @@ -66,6 +67,92 @@ DECLARE_GLOBAL_DATA_PTR; #define PIN_QE_LCD_MUX_LCD 0x0 #define PIN_QE_LCD_MUX_QE 0x1 +#ifdef CONFIG_LS102XA_NS_ACCESS +static struct csu_ns_dev ns_dev[] = { + { CSU_CSLX_PCIE2_IO, CSU_ALL_RW }, + { CSU_CSLX_PCIE1_IO, CSU_ALL_RW }, + { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW }, + { CSU_CSLX_IFC_MEM, CSU_ALL_RW }, + { CSU_CSLX_OCRAM, CSU_ALL_RW }, + { CSU_CSLX_GIC, CSU_ALL_RW }, + { CSU_CSLX_PCIE1, CSU_ALL_RW }, + { CSU_CSLX_OCRAM2, CSU_ALL_RW }, + { CSU_CSLX_QSPI_MEM, CSU_ALL_RW }, + { CSU_CSLX_PCIE2, CSU_ALL_RW }, + { CSU_CSLX_SATA, CSU_ALL_RW }, + { CSU_CSLX_USB3, CSU_ALL_RW }, + { CSU_CSLX_SERDES, CSU_ALL_RW }, + { CSU_CSLX_QDMA, CSU_ALL_RW }, + { CSU_CSLX_LPUART2, CSU_ALL_RW }, + { CSU_CSLX_LPUART1, CSU_ALL_RW }, + { CSU_CSLX_LPUART4, CSU_ALL_RW }, + { CSU_CSLX_LPUART3, CSU_ALL_RW }, + { CSU_CSLX_LPUART6, CSU_ALL_RW }, + { CSU_CSLX_LPUART5, CSU_ALL_RW }, + { CSU_CSLX_DSPI2, CSU_ALL_RW }, + { CSU_CSLX_DSPI1, CSU_ALL_RW }, + { CSU_CSLX_QSPI, CSU_ALL_RW }, + { CSU_CSLX_ESDHC, CSU_ALL_RW }, + { CSU_CSLX_2D_ACE, CSU_ALL_RW }, + { CSU_CSLX_IFC, CSU_ALL_RW }, + { CSU_CSLX_I2C1, CSU_ALL_RW }, + { CSU_CSLX_USB2, CSU_ALL_RW }, + { CSU_CSLX_I2C3, CSU_ALL_RW }, + { CSU_CSLX_I2C2, CSU_ALL_RW }, + { CSU_CSLX_DUART2, CSU_ALL_RW }, + { CSU_CSLX_DUART1, CSU_ALL_RW }, + { CSU_CSLX_WDT2, CSU_ALL_RW }, + { CSU_CSLX_WDT1, CSU_ALL_RW }, + { CSU_CSLX_EDMA, CSU_ALL_RW }, + { CSU_CSLX_SYS_CNT, CSU_ALL_RW }, + { CSU_CSLX_DMA_MUX2, CSU_ALL_RW }, + { CSU_CSLX_DMA_MUX1, CSU_ALL_RW }, + { CSU_CSLX_DDR, CSU_ALL_RW }, + { CSU_CSLX_QUICC, CSU_ALL_RW }, + { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW }, + { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW }, + { CSU_CSLX_SFP, CSU_ALL_RW }, + { CSU_CSLX_TMU, CSU_ALL_RW }, + { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW }, + { CSU_CSLX_RESERVED0, CSU_ALL_RW }, + { CSU_CSLX_ETSEC1, CSU_ALL_RW }, + { CSU_CSLX_SEC5_5, CSU_ALL_RW }, + { CSU_CSLX_ETSEC3, CSU_ALL_RW }, + { CSU_CSLX_ETSEC2, CSU_ALL_RW }, + { CSU_CSLX_GPIO2, CSU_ALL_RW }, + { CSU_CSLX_GPIO1, CSU_ALL_RW }, + { CSU_CSLX_GPIO4, CSU_ALL_RW }, + { CSU_CSLX_GPIO3, CSU_ALL_RW }, + { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW }, + { CSU_CSLX_CSU, CSU_ALL_RW }, + { CSU_CSLX_ASRC, CSU_ALL_RW }, + { CSU_CSLX_SPDIF, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN2, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN1, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN4, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN3, CSU_ALL_RW }, + { CSU_CSLX_SAI2, CSU_ALL_RW }, + { CSU_CSLX_SAI1, CSU_ALL_RW }, + { CSU_CSLX_SAI4, CSU_ALL_RW }, + { CSU_CSLX_SAI3, CSU_ALL_RW }, + { CSU_CSLX_FTM2, CSU_ALL_RW }, + { CSU_CSLX_FTM1, CSU_ALL_RW }, + { CSU_CSLX_FTM4, CSU_ALL_RW }, + { CSU_CSLX_FTM3, CSU_ALL_RW }, + { CSU_CSLX_FTM6, CSU_ALL_RW }, + { CSU_CSLX_FTM5, CSU_ALL_RW }, + { CSU_CSLX_FTM8, CSU_ALL_RW }, + { CSU_CSLX_FTM7, CSU_ALL_RW }, + { CSU_CSLX_COP_DCSR, CSU_ALL_RW }, + { CSU_CSLX_EPU, CSU_ALL_RW }, + { CSU_CSLX_GDI, CSU_ALL_RW }, + { CSU_CSLX_DDI, CSU_ALL_RW }, + { CSU_CSLX_RESERVED1, CSU_ALL_RW }, + { CSU_CSLX_USB3_PHY, CSU_ALL_RW }, + { CSU_CSLX_RESERVED2, CSU_ALL_RW }, +}; +#endif + struct cpld_data { u8 cpld_ver; /* cpld revision */ u8 cpld_ver_sub; /* cpld sub revision */ @@ -148,6 +235,7 @@ unsigned int get_soc_major_rev(void) void ddrmc_init(void) { struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; + u32 temp_sdram_cfg; out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); @@ -161,7 +249,22 @@ void ddrmc_init(void) out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); - out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); +#ifdef CONFIG_DEEP_SLEEP + if (is_warm_boot()) { + out_be32(&ddr->sdram_cfg_2, + DDR_SDRAM_CFG_2 & ~SDRAM_CFG2_D_INIT); + out_be32(&ddr->init_addr, CONFIG_SYS_SDRAM_BASE); + out_be32(&ddr->init_ext_addr, (1 << 31)); + + /* DRAM VRef will not be trained */ + out_be32(&ddr->ddr_cdr2, + DDR_DDR_CDR2 & ~DDR_CDR2_VREF_TRAIN_EN); + } else +#endif + { + out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); + out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2); + } out_be32(&ddr->sdram_mode, DDR_SDRAM_MODE); out_be32(&ddr->sdram_mode_2, DDR_SDRAM_MODE_2); @@ -174,14 +277,35 @@ void ddrmc_init(void) out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); out_be32(&ddr->ddr_cdr1, DDR_DDR_CDR1); - out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2); out_be32(&ddr->sdram_clk_cntl, DDR_SDRAM_CLK_CNTL); out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL); out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2); udelay(1); - out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | DDR_SDRAM_CFG_MEM_EN); + +#ifdef CONFIG_DEEP_SLEEP + if (is_warm_boot()) { + /* enter self-refresh */ + temp_sdram_cfg = in_be32(&ddr->sdram_cfg_2); + temp_sdram_cfg |= SDRAM_CFG2_FRC_SR; + out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg); + + temp_sdram_cfg = (DDR_SDRAM_CFG_MEM_EN | SDRAM_CFG_BI); + } else +#endif + temp_sdram_cfg = (DDR_SDRAM_CFG_MEM_EN & ~SDRAM_CFG_BI); + + out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | temp_sdram_cfg); + +#ifdef CONFIG_DEEP_SLEEP + if (is_warm_boot()) { + /* exit self-refresh */ + temp_sdram_cfg = in_be32(&ddr->sdram_cfg_2); + temp_sdram_cfg &= ~SDRAM_CFG2_FRC_SR; + out_be32(&ddr->sdram_cfg_2, temp_sdram_cfg); + } +#endif } int dram_init(void) @@ -191,6 +315,11 @@ int dram_init(void) #endif gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + +#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD) + fsl_dp_resume(); +#endif + return 0; } @@ -388,6 +517,11 @@ int board_early_init_f(void) out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); } +#if defined(CONFIG_DEEP_SLEEP) + if (is_warm_boot()) + fsl_dp_disable_console(); +#endif + return 0; } @@ -399,99 +533,25 @@ void board_init_f(ulong dummy) get_clocks(); +#if defined(CONFIG_DEEP_SLEEP) + if (is_warm_boot()) + fsl_dp_disable_console(); +#endif + preloader_console_init(); dram_init(); + /* Allow OCRAM access permission as R/W */ +#ifdef CONFIG_LS102XA_NS_ACCESS + enable_devices_ns_access(&ns_dev[4], 1); + enable_devices_ns_access(&ns_dev[7], 1); +#endif + board_init_r(NULL, 0); } #endif -#ifdef CONFIG_LS102XA_NS_ACCESS -static struct csu_ns_dev ns_dev[] = { - { CSU_CSLX_PCIE2_IO, CSU_ALL_RW }, - { CSU_CSLX_PCIE1_IO, CSU_ALL_RW }, - { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW }, - { CSU_CSLX_IFC_MEM, CSU_ALL_RW }, - { CSU_CSLX_OCRAM, CSU_ALL_RW }, - { CSU_CSLX_GIC, CSU_ALL_RW }, - { CSU_CSLX_PCIE1, CSU_ALL_RW }, - { CSU_CSLX_OCRAM2, CSU_ALL_RW }, - { CSU_CSLX_QSPI_MEM, CSU_ALL_RW }, - { CSU_CSLX_PCIE2, CSU_ALL_RW }, - { CSU_CSLX_SATA, CSU_ALL_RW }, - { CSU_CSLX_USB3, CSU_ALL_RW }, - { CSU_CSLX_SERDES, CSU_ALL_RW }, - { CSU_CSLX_QDMA, CSU_ALL_RW }, - { CSU_CSLX_LPUART2, CSU_ALL_RW }, - { CSU_CSLX_LPUART1, CSU_ALL_RW }, - { CSU_CSLX_LPUART4, CSU_ALL_RW }, - { CSU_CSLX_LPUART3, CSU_ALL_RW }, - { CSU_CSLX_LPUART6, CSU_ALL_RW }, - { CSU_CSLX_LPUART5, CSU_ALL_RW }, - { CSU_CSLX_DSPI2, CSU_ALL_RW }, - { CSU_CSLX_DSPI1, CSU_ALL_RW }, - { CSU_CSLX_QSPI, CSU_ALL_RW }, - { CSU_CSLX_ESDHC, CSU_ALL_RW }, - { CSU_CSLX_2D_ACE, CSU_ALL_RW }, - { CSU_CSLX_IFC, CSU_ALL_RW }, - { CSU_CSLX_I2C1, CSU_ALL_RW }, - { CSU_CSLX_USB2, CSU_ALL_RW }, - { CSU_CSLX_I2C3, CSU_ALL_RW }, - { CSU_CSLX_I2C2, CSU_ALL_RW }, - { CSU_CSLX_DUART2, CSU_ALL_RW }, - { CSU_CSLX_DUART1, CSU_ALL_RW }, - { CSU_CSLX_WDT2, CSU_ALL_RW }, - { CSU_CSLX_WDT1, CSU_ALL_RW }, - { CSU_CSLX_EDMA, CSU_ALL_RW }, - { CSU_CSLX_SYS_CNT, CSU_ALL_RW }, - { CSU_CSLX_DMA_MUX2, CSU_ALL_RW }, - { CSU_CSLX_DMA_MUX1, CSU_ALL_RW }, - { CSU_CSLX_DDR, CSU_ALL_RW }, - { CSU_CSLX_QUICC, CSU_ALL_RW }, - { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW }, - { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW }, - { CSU_CSLX_SFP, CSU_ALL_RW }, - { CSU_CSLX_TMU, CSU_ALL_RW }, - { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW }, - { CSU_CSLX_RESERVED0, CSU_ALL_RW }, - { CSU_CSLX_ETSEC1, CSU_ALL_RW }, - { CSU_CSLX_SEC5_5, CSU_ALL_RW }, - { CSU_CSLX_ETSEC3, CSU_ALL_RW }, - { CSU_CSLX_ETSEC2, CSU_ALL_RW }, - { CSU_CSLX_GPIO2, CSU_ALL_RW }, - { CSU_CSLX_GPIO1, CSU_ALL_RW }, - { CSU_CSLX_GPIO4, CSU_ALL_RW }, - { CSU_CSLX_GPIO3, CSU_ALL_RW }, - { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW }, - { CSU_CSLX_CSU, CSU_ALL_RW }, - { CSU_CSLX_ASRC, CSU_ALL_RW }, - { CSU_CSLX_SPDIF, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN2, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN1, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN4, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN3, CSU_ALL_RW }, - { CSU_CSLX_SAI2, CSU_ALL_RW }, - { CSU_CSLX_SAI1, CSU_ALL_RW }, - { CSU_CSLX_SAI4, CSU_ALL_RW }, - { CSU_CSLX_SAI3, CSU_ALL_RW }, - { CSU_CSLX_FTM2, CSU_ALL_RW }, - { CSU_CSLX_FTM1, CSU_ALL_RW }, - { CSU_CSLX_FTM4, CSU_ALL_RW }, - { CSU_CSLX_FTM3, CSU_ALL_RW }, - { CSU_CSLX_FTM6, CSU_ALL_RW }, - { CSU_CSLX_FTM5, CSU_ALL_RW }, - { CSU_CSLX_FTM8, CSU_ALL_RW }, - { CSU_CSLX_FTM7, CSU_ALL_RW }, - { CSU_CSLX_COP_DCSR, CSU_ALL_RW }, - { CSU_CSLX_EPU, CSU_ALL_RW }, - { CSU_CSLX_GDI, CSU_ALL_RW }, - { CSU_CSLX_DDI, CSU_ALL_RW }, - { CSU_CSLX_RESERVED1, CSU_ALL_RW }, - { CSU_CSLX_USB3_PHY, CSU_ALL_RW }, - { CSU_CSLX_RESERVED2, CSU_ALL_RW }, -}; -#endif struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), @@ -529,6 +589,37 @@ struct smmu_stream_id dev_stream_id[] = { { 0x18c, 0x0e, "DEBUG" }, }; +#ifdef CONFIG_DEEP_SLEEP +/* program the regulator (MC34VR500) to support deep sleep */ +void ls1twr_program_regulator(void) +{ + unsigned int i2c_bus; + u8 i2c_device_id; + +#define LS1TWR_I2C_BUS_MC34VR500 1 +#define MC34VR500_ADDR 0x8 +#define MC34VR500_DEVICEID 0x4 +#define MC34VR500_DEVICEID_MASK 0x0f + + i2c_bus = i2c_get_bus_num(); + i2c_set_bus_num(LS1TWR_I2C_BUS_MC34VR500); + i2c_device_id = i2c_reg_read(MC34VR500_ADDR, 0x0) & + MC34VR500_DEVICEID_MASK; + if (i2c_device_id != MC34VR500_DEVICEID) { + printf("The regulator (MC34VR500) does not exist. The device does not support deep sleep.\n"); + return; + } + + i2c_reg_write(MC34VR500_ADDR, 0x31, 0x4); + i2c_reg_write(MC34VR500_ADDR, 0x4d, 0x4); + i2c_reg_write(MC34VR500_ADDR, 0x6d, 0x38); + i2c_reg_write(MC34VR500_ADDR, 0x6f, 0x37); + i2c_reg_write(MC34VR500_ADDR, 0x71, 0x30); + + i2c_set_bus_num(i2c_bus); +} +#endif + int board_init(void) { #ifndef CONFIG_SYS_FSL_NO_SERDES @@ -551,6 +642,9 @@ int board_init(void) u_qe_init(); #endif +#ifdef CONFIG_DEEP_SLEEP + ls1twr_program_regulator(); +#endif return 0; } @@ -567,6 +661,15 @@ int misc_init_r(void) } #endif +#if defined(CONFIG_DEEP_SLEEP) +void board_sleep_prepare(void) +{ +#ifdef CONFIG_LS102XA_NS_ACCESS + enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev)); +#endif +} +#endif + int ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index f99d594..17392c9 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -406,10 +406,19 @@ static void kick_trng(int ent_delay) sec_out32(&rng->rtsdctl, val); /* min. freq. count, equal to 1/4 of the entropy sample length */ sec_out32(&rng->rtfreqmin, ent_delay >> 2); - /* max. freq. count, equal to 8 times the entropy sample length */ - sec_out32(&rng->rtfreqmax, ent_delay << 3); + /* disable maximum frequency count */ + sec_out32(&rng->rtfreqmax, RTFRQMAX_DISABLE); + /* read the control register */ + val = sec_in32(&rng->rtmctl); + /* + * select raw sampling in both entropy shifter + * and statistical checker + */ + sec_setbits32(&val, RTMCTL_SAMP_MODE_RAW_ES_SC); /* put RNG4 into run mode */ - sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); + sec_clrbits32(&val, RTMCTL_PRGM); + /* write back the control register */ + sec_out32(&rng->rtmctl, val); } static int rng_init(void) @@ -459,14 +468,16 @@ static int rng_init(void) int sec_init(void) { - int ret = 0; - -#ifdef CONFIG_PHYS_64BIT ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR; uint32_t mcr = sec_in32(&sec->mcfgr); + int ret = 0; - sec_out32(&sec->mcfgr, mcr | 1 << MCFGR_PS_SHIFT); + mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0x2 << MCFGR_AWCACHE_SHIFT); +#ifdef CONFIG_PHYS_64BIT + mcr |= (1 << MCFGR_PS_SHIFT); #endif + sec_out32(&sec->mcfgr, mcr); + ret = jr_init(); if (ret < 0) { printf("SEC initialization failed\n"); diff --git a/drivers/crypto/fsl/jr.h b/drivers/crypto/fsl/jr.h index cce2c58..1526060 100644 --- a/drivers/crypto/fsl/jr.h +++ b/drivers/crypto/fsl/jr.h @@ -21,6 +21,8 @@ #define MCFGR_SWRST ((uint32_t)(1)<<31) /* Software Reset */ #define MCFGR_DMA_RST ((uint32_t)(1)<<28) /* DMA Reset */ #define MCFGR_PS_SHIFT 16 +#define MCFGR_AWCACHE_SHIFT 8 +#define MCFGR_AWCACHE_MASK (0xf << MCFGR_AWCACHE_SHIFT) #define JR_INTMASK 0x00000001 #define JRCR_RESET 0x01 #define JRINT_ERR_HALT_INPROGRESS 0x4 diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c index 443ee96..0940faf 100644 --- a/drivers/crypto/fsl/sec.c +++ b/drivers/crypto/fsl/sec.c @@ -60,27 +60,26 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) return; } - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels); - err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4); + err = fdt_setprop_u32(blob, crypto_node, "fsl,num-channels", + sec_rev_prop_list[sec_idx].num_channels); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask); - err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", - &val, 4); + err = fdt_setprop_u32(blob, crypto_node, "fsl,descriptor-types-mask", + sec_rev_prop_list[sec_idx].descriptor_types_mask); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask); - err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4); + err = fdt_setprop_u32(blob, crypto_node, "fsl,exec-units-mask", + sec_rev_prop_list[sec_idx].exec_units_mask); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); - val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len); - err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4); + err = fdt_setprop_u32(blob, crypto_node, "fsl,channel-fifo-len", + sec_rev_prop_list[sec_idx].channel_fifo_len); if (err < 0) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); @@ -155,8 +154,7 @@ static void fdt_fixup_crypto_era(void *blob, u32 era) return; } - err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era, - sizeof(era)); + err = fdt_setprop_u32(blob, crypto_node, "fsl,sec-era", era); if (err < 0) { printf("ERROR: could not set fsl,sec-era property: %s\n", fdt_strerror(err)); diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 14ecf12..72ec1be 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -535,7 +535,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, * which is currently STEP_ASSIGN_ADDRESSES. */ populate_memctl_options( - timing_params[i].all_dimms_registered, + &timing_params[i], &pinfo->memctl_opts[i], pinfo->dimm_params[i], i); /* diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 3b30fa2..3c09c64 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -499,7 +499,7 @@ static inline unsigned int auto_bank_intlv(dimm_params_t *pdimm) return 0; } -unsigned int populate_memctl_options(int all_dimms_registered, +unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) @@ -640,7 +640,7 @@ unsigned int populate_memctl_options(int all_dimms_registered, popts->ba_intlv_ctl = 0; /* Memory Organization Parameters */ - popts->registered_dimm_en = all_dimms_registered; + popts->registered_dimm_en = common_dimm->all_dimms_registered; /* Operational Mode Paramters */ @@ -778,9 +778,11 @@ unsigned int populate_memctl_options(int all_dimms_registered, * Set this to 0 for global auto precharge * The value of 0x100 has been used for DDR1, DDR2, DDR3. * It is not wrong. Any value should be OK. The performance depends on - * applications. There is no one good value for all. + * applications. There is no one good value for all. One way to set + * is to use 1/4 of refint value. */ - popts->bstopre = 0x100; + popts->bstopre = picos_to_mclk(ctrl_num, common_dimm->refresh_rate_ps) + >> 2; /* * Window for four activates -- tFAW diff --git a/drivers/net/fsl-mc/dpbp.c b/drivers/net/fsl-mc/dpbp.c index 3853e58..1517a70 100644 --- a/drivers/net/fsl-mc/dpbp.c +++ b/drivers/net/fsl-mc/dpbp.c @@ -10,14 +10,18 @@ #include <fsl-mc/fsl_mc_cmd.h> #include <fsl-mc/fsl_dpbp.h> -int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token) +int dpbp_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int dpbp_id, + uint16_t *token) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPBP_CMDID_OPEN, - MC_CMD_PRI_LOW, 0); + cmd_flags, + 0); DPBP_CMD_OPEN(cmd, dpbp_id); /* send command to mc*/ @@ -31,55 +35,66 @@ int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token) return err; } -int dpbp_close(struct fsl_mc_io *mc_io, uint16_t token) +int dpbp_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ - cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLOSE, MC_CMD_PRI_HIGH, + cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLOSE, cmd_flags, token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpbp_enable(struct fsl_mc_io *mc_io, uint16_t token) +int dpbp_enable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ - cmd.header = mc_encode_cmd_header(DPBP_CMDID_ENABLE, MC_CMD_PRI_LOW, + cmd.header = mc_encode_cmd_header(DPBP_CMDID_ENABLE, cmd_flags, token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpbp_disable(struct fsl_mc_io *mc_io, uint16_t token) +int dpbp_disable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPBP_CMDID_DISABLE, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpbp_reset(struct fsl_mc_io *mc_io, uint16_t token) +int dpbp_reset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPBP_CMDID_RESET, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } int dpbp_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpbp_attr *attr) { @@ -88,7 +103,8 @@ int dpbp_get_attributes(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_ATTR, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); diff --git a/drivers/net/fsl-mc/dpio/dpio.c b/drivers/net/fsl-mc/dpio/dpio.c index b07eff7..cd3fd50 100644 --- a/drivers/net/fsl-mc/dpio/dpio.c +++ b/drivers/net/fsl-mc/dpio/dpio.c @@ -8,14 +8,18 @@ #include <fsl-mc/fsl_mc_cmd.h> #include <fsl-mc/fsl_dpio.h> -int dpio_open(struct fsl_mc_io *mc_io, int dpio_id, uint16_t *token) +int dpio_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int dpio_id, + uint16_t *token) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPIO_CMDID_OPEN, - MC_CMD_PRI_LOW, 0); + cmd_flags, + 0); DPIO_CMD_OPEN(cmd, dpio_id); /* send command to mc*/ @@ -29,56 +33,68 @@ int dpio_open(struct fsl_mc_io *mc_io, int dpio_id, uint16_t *token) return 0; } -int dpio_close(struct fsl_mc_io *mc_io, uint16_t token) +int dpio_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPIO_CMDID_CLOSE, - MC_CMD_PRI_HIGH, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpio_enable(struct fsl_mc_io *mc_io, uint16_t token) +int dpio_enable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPIO_CMDID_ENABLE, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpio_disable(struct fsl_mc_io *mc_io, uint16_t token) +int dpio_disable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPIO_CMDID_DISABLE, - MC_CMD_PRI_LOW, + cmd_flags, token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpio_reset(struct fsl_mc_io *mc_io, uint16_t token) +int dpio_reset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPIO_CMDID_RESET, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } int dpio_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpio_attr *attr) { @@ -87,7 +103,7 @@ int dpio_get_attributes(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_ATTR, - MC_CMD_PRI_LOW, + cmd_flags, token); /* send command to mc*/ diff --git a/drivers/net/fsl-mc/dpmng.c b/drivers/net/fsl-mc/dpmng.c index 01ee112..d96e26b 100644 --- a/drivers/net/fsl-mc/dpmng.c +++ b/drivers/net/fsl-mc/dpmng.c @@ -7,14 +7,17 @@ #include <fsl-mc/fsl_dpmng.h> #include "fsl_dpmng_cmd.h" -int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info) +int mc_get_version(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + struct mc_version *mc_ver_info) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION, - MC_CMD_PRI_LOW, 0); + cmd_flags, + 0); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); diff --git a/drivers/net/fsl-mc/dpni.c b/drivers/net/fsl-mc/dpni.c index 7bc2504..9111f35 100644 --- a/drivers/net/fsl-mc/dpni.c +++ b/drivers/net/fsl-mc/dpni.c @@ -8,14 +8,18 @@ #include <fsl-mc/fsl_mc_cmd.h> #include <fsl-mc/fsl_dpni.h> -int dpni_open(struct fsl_mc_io *mc_io, int dpni_id, uint16_t *token) +int dpni_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int dpni_id, + uint16_t *token) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_OPEN, - MC_CMD_PRI_LOW, 0); + cmd_flags, + 0); DPNI_CMD_OPEN(cmd, dpni_id); /* send command to mc*/ @@ -29,19 +33,23 @@ int dpni_open(struct fsl_mc_io *mc_io, int dpni_id, uint16_t *token) return 0; } -int dpni_close(struct fsl_mc_io *mc_io, uint16_t token) +int dpni_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLOSE, - MC_CMD_PRI_HIGH, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } int dpni_set_pools(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_pools_cfg *cfg) { @@ -49,7 +57,7 @@ int dpni_set_pools(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_POOLS, - MC_CMD_PRI_LOW, + cmd_flags, token); DPNI_CMD_SET_POOLS(cmd, cfg); @@ -57,44 +65,53 @@ int dpni_set_pools(struct fsl_mc_io *mc_io, return mc_send_command(mc_io, &cmd); } -int dpni_enable(struct fsl_mc_io *mc_io, uint16_t token) +int dpni_enable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_ENABLE, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpni_disable(struct fsl_mc_io *mc_io, uint16_t token) +int dpni_disable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_DISABLE, - MC_CMD_PRI_LOW, + cmd_flags, token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpni_reset(struct fsl_mc_io *mc_io, uint16_t token) +int dpni_reset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_RESET, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } int dpni_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_attr *attr) { @@ -103,7 +120,7 @@ int dpni_get_attributes(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_ATTR, - MC_CMD_PRI_LOW, + cmd_flags, token); /* send command to mc*/ @@ -118,6 +135,7 @@ int dpni_get_attributes(struct fsl_mc_io *mc_io, } int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_buffer_layout *layout) { @@ -126,7 +144,8 @@ int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_BUFFER_LAYOUT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -140,6 +159,7 @@ int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io, } int dpni_set_rx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_buffer_layout *layout) { @@ -147,7 +167,8 @@ int dpni_set_rx_buffer_layout(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_BUFFER_LAYOUT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_RX_BUFFER_LAYOUT(cmd, layout); /* send command to mc*/ @@ -155,6 +176,7 @@ int dpni_set_rx_buffer_layout(struct fsl_mc_io *mc_io, } int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_buffer_layout *layout) { @@ -163,7 +185,8 @@ int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_BUFFER_LAYOUT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -177,6 +200,7 @@ int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io, } int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_buffer_layout *layout) { @@ -184,7 +208,8 @@ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_BUFFER_LAYOUT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_TX_BUFFER_LAYOUT(cmd, layout); /* send command to mc*/ @@ -192,6 +217,7 @@ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, } int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_buffer_layout *layout) { @@ -200,7 +226,8 @@ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_CONF_BUFFER_LAYOUT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -214,6 +241,7 @@ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, } int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_buffer_layout *layout) { @@ -221,21 +249,25 @@ int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_CONF_BUFFER_LAYOUT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_TX_CONF_BUFFER_LAYOUT(cmd, layout); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } -int dpni_get_qdid(struct fsl_mc_io *mc_io, uint16_t token, uint16_t *qdid) +int dpni_get_qdid(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + uint16_t *qdid) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QDID, - MC_CMD_PRI_LOW, + cmd_flags, token); /* send command to mc*/ @@ -250,6 +282,7 @@ int dpni_get_qdid(struct fsl_mc_io *mc_io, uint16_t token, uint16_t *qdid) } int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint16_t *data_offset) { @@ -258,7 +291,8 @@ int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_DATA_OFFSET, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -272,6 +306,7 @@ int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io, } int dpni_get_counter(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, enum dpni_counter counter, uint64_t *value) @@ -281,7 +316,8 @@ int dpni_get_counter(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_COUNTER, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_GET_COUNTER(cmd, counter); /* send command to mc*/ @@ -296,6 +332,7 @@ int dpni_get_counter(struct fsl_mc_io *mc_io, } int dpni_set_counter(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, enum dpni_counter counter, uint64_t value) @@ -304,7 +341,8 @@ int dpni_set_counter(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_COUNTER, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_COUNTER(cmd, counter, value); /* send command to mc*/ @@ -312,14 +350,16 @@ int dpni_set_counter(struct fsl_mc_io *mc_io, } int dpni_set_link_cfg(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, - const struct dpni_link_cfg *cfg) + const struct dpni_link_cfg *cfg) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_LINK_CFG, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_LINK_CFG(cmd, cfg); /* send command to mc*/ @@ -327,6 +367,7 @@ int dpni_set_link_cfg(struct fsl_mc_io *mc_io, } int dpni_get_link_state(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_link_state *state) { @@ -335,7 +376,8 @@ int dpni_get_link_state(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_LINK_STATE, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -350,6 +392,7 @@ int dpni_get_link_state(struct fsl_mc_io *mc_io, int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const uint8_t mac_addr[6]) { @@ -357,7 +400,8 @@ int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_PRIM_MAC, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr); /* send command to mc*/ @@ -365,6 +409,7 @@ int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, } int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint8_t mac_addr[6]) { @@ -373,7 +418,8 @@ int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PRIM_MAC, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -387,6 +433,7 @@ int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io, } int dpni_add_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const uint8_t mac_addr[6]) { @@ -394,7 +441,8 @@ int dpni_add_mac_addr(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_MAC_ADDR, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_ADD_MAC_ADDR(cmd, mac_addr); /* send command to mc*/ @@ -402,6 +450,7 @@ int dpni_add_mac_addr(struct fsl_mc_io *mc_io, } int dpni_remove_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const uint8_t mac_addr[6]) { @@ -409,7 +458,8 @@ int dpni_remove_mac_addr(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_MAC_ADDR, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_REMOVE_MAC_ADDR(cmd, mac_addr); /* send command to mc*/ @@ -417,6 +467,7 @@ int dpni_remove_mac_addr(struct fsl_mc_io *mc_io, } int dpni_set_tx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint16_t *flow_id, const struct dpni_tx_flow_cfg *cfg) @@ -426,7 +477,8 @@ int dpni_set_tx_flow(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_FLOW, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_TX_FLOW(cmd, *flow_id, cfg); /* send command to mc*/ @@ -441,6 +493,7 @@ int dpni_set_tx_flow(struct fsl_mc_io *mc_io, } int dpni_get_tx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint16_t flow_id, struct dpni_tx_flow_attr *attr) @@ -450,7 +503,8 @@ int dpni_get_tx_flow(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_FLOW, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_GET_TX_FLOW(cmd, flow_id); /* send command to mc*/ @@ -465,6 +519,7 @@ int dpni_get_tx_flow(struct fsl_mc_io *mc_io, } int dpni_set_rx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint8_t tc_id, uint16_t flow_id, @@ -474,7 +529,8 @@ int dpni_set_rx_flow(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_FLOW, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_SET_RX_FLOW(cmd, tc_id, flow_id, cfg); /* send command to mc*/ @@ -482,6 +538,7 @@ int dpni_set_rx_flow(struct fsl_mc_io *mc_io, } int dpni_get_rx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint8_t tc_id, uint16_t flow_id, @@ -491,7 +548,8 @@ int dpni_get_rx_flow(struct fsl_mc_io *mc_io, int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_RX_FLOW, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPNI_CMD_GET_RX_FLOW(cmd, tc_id, flow_id); /* send command to mc*/ diff --git a/drivers/net/fsl-mc/dprc.c b/drivers/net/fsl-mc/dprc.c index d481200..357aa48 100644 --- a/drivers/net/fsl-mc/dprc.c +++ b/drivers/net/fsl-mc/dprc.c @@ -11,14 +11,17 @@ #include <fsl-mc/fsl_mc_cmd.h> #include <fsl-mc/fsl_dprc.h> -int dprc_get_container_id(struct fsl_mc_io *mc_io, int *container_id) +int dprc_get_container_id(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int *container_id) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONT_ID, - MC_CMD_PRI_LOW, 0); + cmd_flags, + 0); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -31,13 +34,16 @@ int dprc_get_container_id(struct fsl_mc_io *mc_io, int *container_id) return 0; } -int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token) +int dprc_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int container_id, + uint16_t *token) { struct mc_command cmd = { 0 }; int err; /* prepare command */ - cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, MC_CMD_PRI_LOW, + cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, cmd_flags, 0); DPRC_CMD_OPEN(cmd, container_id); @@ -52,12 +58,14 @@ int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token) return 0; } -int dprc_close(struct fsl_mc_io *mc_io, uint16_t token) +int dprc_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token) { struct mc_command cmd = { 0 }; /* prepare command */ - cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLOSE, MC_CMD_PRI_HIGH, + cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLOSE, cmd_flags, token); /* send command to mc*/ @@ -65,6 +73,7 @@ int dprc_close(struct fsl_mc_io *mc_io, uint16_t token) } int dprc_reset_container(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, int child_container_id) { @@ -72,7 +81,8 @@ int dprc_reset_container(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_RESET_CONT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPRC_CMD_RESET_CONTAINER(cmd, child_container_id); /* send command to mc*/ @@ -80,6 +90,7 @@ int dprc_reset_container(struct fsl_mc_io *mc_io, } int dprc_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dprc_attributes *attr) { @@ -88,7 +99,7 @@ int dprc_get_attributes(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_ATTR, - MC_CMD_PRI_LOW, + cmd_flags, token); /* send command to mc*/ @@ -102,14 +113,18 @@ int dprc_get_attributes(struct fsl_mc_io *mc_io, return 0; } -int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count) +int dprc_get_obj_count(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + int *obj_count) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_COUNT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); /* send command to mc*/ err = mc_send_command(mc_io, &cmd); @@ -123,6 +138,7 @@ int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count) } int dprc_get_obj(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, int obj_index, struct dprc_obj_desc *obj_desc) @@ -132,7 +148,7 @@ int dprc_get_obj(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ, - MC_CMD_PRI_LOW, + cmd_flags, token); DPRC_CMD_GET_OBJ(cmd, obj_index); @@ -148,6 +164,7 @@ int dprc_get_obj(struct fsl_mc_io *mc_io, } int dprc_get_res_count(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, char *type, int *res_count) @@ -159,7 +176,8 @@ int dprc_get_res_count(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_COUNT, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPRC_CMD_GET_RES_COUNT(cmd, type); /* send command to mc*/ @@ -174,6 +192,7 @@ int dprc_get_res_count(struct fsl_mc_io *mc_io, } int dprc_get_res_ids(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, char *type, struct dprc_res_ids_range_desc *range_desc) @@ -183,7 +202,8 @@ int dprc_get_res_ids(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_IDS, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPRC_CMD_GET_RES_IDS(cmd, range_desc, type); /* send command to mc*/ @@ -198,6 +218,7 @@ int dprc_get_res_ids(struct fsl_mc_io *mc_io, } int dprc_get_obj_region(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, char *obj_type, int obj_id, @@ -209,7 +230,8 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG, - MC_CMD_PRI_LOW, token); + cmd_flags, + token); DPRC_CMD_GET_OBJ_REGION(cmd, obj_type, obj_id, region_index); /* send command to mc*/ @@ -224,23 +246,26 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io, } int dprc_connect(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dprc_endpoint *endpoint1, - const struct dprc_endpoint *endpoint2) + const struct dprc_endpoint *endpoint2, + const struct dprc_connection_cfg *cfg) { struct mc_command cmd = { 0 }; /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CONNECT, - MC_CMD_PRI_LOW, + cmd_flags, token); - DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2); + DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2, cfg); /* send command to mc*/ return mc_send_command(mc_io, &cmd); } int dprc_disconnect(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dprc_endpoint *endpoint) { @@ -248,7 +273,7 @@ int dprc_disconnect(struct fsl_mc_io *mc_io, /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_DISCONNECT, - MC_CMD_PRI_LOW, + cmd_flags, token); DPRC_CMD_DISCONNECT(cmd, endpoint); @@ -257,17 +282,18 @@ int dprc_disconnect(struct fsl_mc_io *mc_io, } int dprc_get_connection(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, - const struct dprc_endpoint *endpoint1, - struct dprc_endpoint *endpoint2, - int *state) + const struct dprc_endpoint *endpoint1, + struct dprc_endpoint *endpoint2, + int *state) { struct mc_command cmd = { 0 }; int err; /* prepare command */ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONNECTION, - MC_CMD_PRI_LOW, + cmd_flags, token); DPRC_CMD_GET_CONNECTION(cmd, endpoint1); diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 62a68c2..ea987d7 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -547,7 +547,7 @@ int mc_init(void) debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n", portal_id, dflt_mc_io->mmio_regs); - error = mc_get_version(dflt_mc_io, &mc_ver_info); + error = mc_get_version(dflt_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info); if (error != 0) { printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n", error); @@ -634,19 +634,21 @@ int dpio_init(struct dprc_obj_desc obj_desc) dflt_dpio->dpio_id = obj_desc.id; - err = dpio_open(dflt_mc_io, obj_desc.id, &dflt_dpio_handle); + err = dpio_open(dflt_mc_io, MC_CMD_NO_FLAGS, obj_desc.id, + &dflt_dpio_handle); if (err) { printf("dpio_open() failed\n"); goto err_open; } - err = dpio_get_attributes(dflt_mc_io, dflt_dpio_handle, &attr); + err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, + dflt_dpio_handle, &attr); if (err) { printf("dpio_get_attributes() failed %d\n", err); goto err_get_attr; } - err = dpio_enable(dflt_mc_io, dflt_dpio_handle); + err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio_handle); if (err) { printf("dpio_enable() failed %d\n", err); goto err_get_enable; @@ -671,9 +673,9 @@ int dpio_init(struct dprc_obj_desc obj_desc) err_get_swp_init: err_get_enable: - dpio_disable(dflt_mc_io, dflt_dpio_handle); + dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio_handle); err_get_attr: - dpio_close(dflt_mc_io, dflt_dpio_handle); + dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio_handle); err_open: free(dflt_dpio); return err; @@ -710,8 +712,9 @@ int dprc_init_container_obj(struct dprc_obj_desc obj_desc, uint16_t dprc_handle) } else if (!strcmp(obj_desc.type, "dpni")) { strcpy(dpni_endpoint.type, obj_desc.type); dpni_endpoint.id = obj_desc.id; - error = dprc_get_connection(dflt_mc_io, dprc_handle, - &dpni_endpoint, &dpmac_endpoint, &state); + error = dprc_get_connection(dflt_mc_io, MC_CMD_NO_FLAGS, + dprc_handle, &dpni_endpoint, + &dpmac_endpoint, &state); if (!strcmp(dpmac_endpoint.type, "dpmac")) error = ldpaa_eth_init(obj_desc); if (error < 0) @@ -728,7 +731,7 @@ int dprc_scan_container_obj(uint16_t dprc_handle, char *obj_type, int i) memset((void *)&obj_desc, 0x00, sizeof(struct dprc_obj_desc)); - error = dprc_get_obj(dflt_mc_io, dprc_handle, + error = dprc_get_obj(dflt_mc_io, MC_CMD_NO_FLAGS, dprc_handle, i, &obj_desc); if (error < 0) { printf("dprc_get_obj(i=%d) failed: %d\n", @@ -761,7 +764,8 @@ int fsl_mc_ldpaa_init(bd_t *bis) if (error < 0) goto error; - error = dprc_get_container_id(dflt_mc_io, &container_id); + error = dprc_get_container_id(dflt_mc_io, MC_CMD_NO_FLAGS, + &container_id); if (error < 0) { printf("dprc_get_container_id() failed: %d\n", error); goto error; @@ -769,7 +773,8 @@ int fsl_mc_ldpaa_init(bd_t *bis) debug("fsl-mc: Container id=0x%x\n", container_id); - error = dprc_open(dflt_mc_io, container_id, &dflt_dprc_handle); + error = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, container_id, + &dflt_dprc_handle); if (error < 0) { printf("dprc_open() failed: %d\n", error); goto error; @@ -777,7 +782,7 @@ int fsl_mc_ldpaa_init(bd_t *bis) dprc_opened = true; error = dprc_get_obj_count(dflt_mc_io, - dflt_dprc_handle, + MC_CMD_NO_FLAGS, dflt_dprc_handle, &num_child_objects); if (error < 0) { printf("dprc_get_obj_count() failed: %d\n", error); @@ -804,7 +809,7 @@ int fsl_mc_ldpaa_init(bd_t *bis) } error: if (dprc_opened) - dprc_close(dflt_mc_io, dflt_dprc_handle); + dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle); return error; } @@ -814,17 +819,20 @@ void fsl_mc_ldpaa_exit(bd_t *bis) int err; if (get_mc_boot_status() == 0) { - err = dpio_disable(dflt_mc_io, dflt_dpio_handle); + err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, + dflt_dpio_handle); if (err < 0) { printf("dpio_disable() failed: %d\n", err); return; } - err = dpio_reset(dflt_mc_io, dflt_dpio_handle); + err = dpio_reset(dflt_mc_io, MC_CMD_NO_FLAGS, + dflt_dpio_handle); if (err < 0) { printf("dpio_reset() failed: %d\n", err); return; } - err = dpio_close(dflt_mc_io, dflt_dpio_handle); + err = dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, + dflt_dpio_handle); if (err < 0) { printf("dpio_close() failed: %d\n", err); return; diff --git a/drivers/net/fsl-mc/mc_sys.c b/drivers/net/fsl-mc/mc_sys.c index 3fc1f98..2136670 100644 --- a/drivers/net/fsl-mc/mc_sys.c +++ b/drivers/net/fsl-mc/mc_sys.c @@ -14,7 +14,7 @@ #include <asm/io.h> #define MC_CMD_HDR_READ_CMDID(_hdr) \ - ((uint16_t)u64_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S)) + ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S)) /** * mc_send_command - Send MC command and wait for response diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 50ca6e4..4de7586 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -240,8 +240,8 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) if (err) goto err_bind; - err = dpni_get_primary_mac_addr(dflt_mc_io, priv->dpni_handle, - mac_addr); + err = dpni_get_primary_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS, + priv->dpni_handle, mac_addr); if (err) { printf("dpni_get_primary_mac_addr() failed\n"); return err; @@ -268,15 +268,15 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) priv->phydev->duplex = DUPLEX_FULL; #endif - err = dpni_enable(dflt_mc_io, priv->dpni_handle); + err = dpni_enable(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); if (err < 0) { printf("dpni_enable() failed\n"); return err; } /* TODO: support multiple Rx flows */ - err = dpni_get_rx_flow(dflt_mc_io, priv->dpni_handle, 0, 0, - &rx_queue_attr); + err = dpni_get_rx_flow(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle, + 0, 0, &rx_queue_attr); if (err) { printf("dpni_get_rx_flow() failed\n"); goto err_rx_flow; @@ -284,7 +284,8 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) priv->rx_dflt_fqid = rx_queue_attr.fqid; - err = dpni_get_qdid(dflt_mc_io, priv->dpni_handle, &priv->tx_qdid); + err = dpni_get_qdid(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle, + &priv->tx_qdid); if (err) { printf("dpni_get_qdid() failed\n"); goto err_qdid; @@ -297,11 +298,11 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) err_qdid: err_rx_flow: - dpni_disable(dflt_mc_io, priv->dpni_handle); + dpni_disable(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); err_bind: ldpaa_dpbp_free(); err_dpbp_setup: - dpni_close(dflt_mc_io, priv->dpni_handle); + dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); err_dpni_setup: return err; } @@ -315,7 +316,7 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) (net_dev->state == ETH_STATE_INIT)) return; /* Stop Tx and Rx traffic */ - err = dpni_disable(dflt_mc_io, priv->dpni_handle); + err = dpni_disable(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); if (err < 0) printf("dpni_disable() failed\n"); @@ -324,8 +325,8 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) #endif ldpaa_dpbp_free(); - dpni_reset(dflt_mc_io, priv->dpni_handle); - dpni_close(dflt_mc_io, priv->dpni_handle); + dpni_reset(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); + dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); } static void ldpaa_dpbp_drain_cnt(int count) @@ -419,20 +420,21 @@ static int ldpaa_dpbp_setup(void) { int err; - err = dpbp_open(dflt_mc_io, dflt_dpbp->dpbp_attr.id, + err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id, &dflt_dpbp->dpbp_handle); if (err) { printf("dpbp_open() failed\n"); goto err_open; } - err = dpbp_enable(dflt_mc_io, dflt_dpbp->dpbp_handle); + err = dpbp_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); if (err) { printf("dpbp_enable() failed\n"); goto err_enable; } - err = dpbp_get_attributes(dflt_mc_io, dflt_dpbp->dpbp_handle, + err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, + dflt_dpbp->dpbp_handle, &dflt_dpbp->dpbp_attr); if (err) { printf("dpbp_get_attributes() failed\n"); @@ -450,9 +452,9 @@ static int ldpaa_dpbp_setup(void) err_seed: err_get_attr: - dpbp_disable(dflt_mc_io, dflt_dpbp->dpbp_handle); + dpbp_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); err_enable: - dpbp_close(dflt_mc_io, dflt_dpbp->dpbp_handle); + dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); err_open: return err; } @@ -460,9 +462,9 @@ err_open: static void ldpaa_dpbp_free(void) { ldpaa_dpbp_drain(); - dpbp_disable(dflt_mc_io, dflt_dpbp->dpbp_handle); - dpbp_reset(dflt_mc_io, dflt_dpbp->dpbp_handle); - dpbp_close(dflt_mc_io, dflt_dpbp->dpbp_handle); + dpbp_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); + dpbp_reset(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); + dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle); } static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) @@ -470,14 +472,15 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) int err; /* and get a handle for the DPNI this interface is associate with */ - err = dpni_open(dflt_mc_io, priv->dpni_id, &priv->dpni_handle); + err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_id, + &priv->dpni_handle); if (err) { printf("dpni_open() failed\n"); goto err_open; } - err = dpni_get_attributes(dflt_mc_io, priv->dpni_handle, - &priv->dpni_attrs); + err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS, + priv->dpni_handle, &priv->dpni_attrs); if (err) { printf("dpni_get_attributes() failed (err=%d)\n", err); goto err_get_attr; @@ -491,8 +494,8 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) priv->buf_layout.pass_frame_status = true; priv->buf_layout.private_data_size = LDPAA_ETH_SWA_SIZE; /* ...rx, ... */ - err = dpni_set_rx_buffer_layout(dflt_mc_io, priv->dpni_handle, - &priv->buf_layout); + err = dpni_set_rx_buffer_layout(dflt_mc_io, MC_CMD_NO_FLAGS, + priv->dpni_handle, &priv->buf_layout); if (err) { printf("dpni_set_rx_buffer_layout() failed"); goto err_buf_layout; @@ -500,8 +503,8 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) /* ... tx, ... */ priv->buf_layout.options &= ~DPNI_BUF_LAYOUT_OPT_PARSER_RESULT; - err = dpni_set_tx_buffer_layout(dflt_mc_io, priv->dpni_handle, - &priv->buf_layout); + err = dpni_set_tx_buffer_layout(dflt_mc_io, MC_CMD_NO_FLAGS, + priv->dpni_handle, &priv->buf_layout); if (err) { printf("dpni_set_tx_buffer_layout() failed"); goto err_buf_layout; @@ -509,7 +512,8 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) /* ... tx-confirm. */ priv->buf_layout.options &= ~DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE; - err = dpni_set_tx_conf_buffer_layout(dflt_mc_io, priv->dpni_handle, + err = dpni_set_tx_conf_buffer_layout(dflt_mc_io, MC_CMD_NO_FLAGS, + priv->dpni_handle, &priv->buf_layout); if (err) { printf("dpni_set_tx_conf_buffer_layout() failed"); @@ -519,8 +523,8 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) /* Now that we've set our tx buffer layout, retrieve the minimum * required tx data offset. */ - err = dpni_get_tx_data_offset(dflt_mc_io, priv->dpni_handle, - &priv->tx_data_offset); + err = dpni_get_tx_data_offset(dflt_mc_io, MC_CMD_NO_FLAGS, + priv->dpni_handle, &priv->tx_data_offset); if (err) { printf("dpni_get_tx_data_offset() failed\n"); goto err_data_offset; @@ -538,7 +542,7 @@ static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv) err_data_offset: err_buf_layout: err_get_attr: - dpni_close(dflt_mc_io, priv->dpni_handle); + dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle); err_open: return err; } @@ -552,7 +556,8 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv) pools_params.num_dpbp = 1; pools_params.pools[0].dpbp_id = (uint16_t)dflt_dpbp->dpbp_attr.id; pools_params.pools[0].buffer_size = LDPAA_ETH_RX_BUFFER_SIZE; - err = dpni_set_pools(dflt_mc_io, priv->dpni_handle, &pools_params); + err = dpni_set_pools(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle, + &pools_params); if (err) { printf("dpni_set_pools() failed\n"); return err; @@ -564,7 +569,7 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv) dflt_tx_flow.options = DPNI_TX_FLOW_OPT_ONLY_TX_ERROR; dflt_tx_flow.conf_err_cfg.use_default_queue = 0; dflt_tx_flow.conf_err_cfg.errors_only = 1; - err = dpni_set_tx_flow(dflt_mc_io, priv->dpni_handle, + err = dpni_set_tx_flow(dflt_mc_io, MC_CMD_NO_FLAGS, priv->dpni_handle, &priv->tx_flow_id, &dflt_tx_flow); if (err) { printf("dpni_set_tx_flow() failed\n"); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 157491c..df50b48 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -526,3 +526,56 @@ int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap) } return 0; } + +/** + * pci_find_next_ext_capability - Find an extended capability + * + * Returns the address of the next matching extended capability structure + * within the device's PCI configuration space or 0 if the device does + * not support it. Some capabilities can occur several times, e.g., the + * vendor-specific capability, and this provides a way to find them all. + */ +int pci_find_next_ext_capability(struct pci_controller *hose, pci_dev_t dev, + int start, int cap) +{ + u32 header; + int ttl, pos = PCI_CFG_SPACE_SIZE; + + /* minimum 8 bytes per capability */ + ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; + + if (start) + pos = start; + + pci_hose_read_config_dword(hose, dev, pos, &header); + if (header == 0xffffffff || header == 0) + return 0; + + while (ttl-- > 0) { + if (PCI_EXT_CAP_ID(header) == cap && pos != start) + return pos; + + pos = PCI_EXT_CAP_NEXT(header); + if (pos < PCI_CFG_SPACE_SIZE) + break; + + pci_hose_read_config_dword(hose, dev, pos, &header); + if (header == 0xffffffff || header == 0) + break; + } + + return 0; +} + +/** + * pci_hose_find_ext_capability - Find an extended capability + * + * Returns the address of the requested extended capability structure + * within the device's PCI configuration space or 0 if the device does + * not support it. + */ +int pci_hose_find_ext_capability(struct pci_controller *hose, pci_dev_t dev, + int cap) +{ + return pci_find_next_ext_capability(hose, dev, 0, cap); +} diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 3ef4975..95cfe8c 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -25,6 +25,10 @@ #define CONFIG_SYS_PCI_MEMORY_SIZE (2 * 1024 * 1024 * 1024UL) /* 2G */ #endif +#ifndef CONFIG_SYS_PCI_EP_MEMORY_BASE +#define CONFIG_SYS_PCI_EP_MEMORY_BASE CONFIG_SYS_LOAD_ADDR +#endif + /* iATU registers */ #define PCIE_ATU_VIEWPORT 0x900 #define PCIE_ATU_REGION_INBOUND (0x1 << 31) @@ -41,6 +45,7 @@ #define PCIE_ATU_CR2 0x908 #define PCIE_ATU_ENABLE (0x1 << 31) #define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30) +#define PCIE_ATU_BAR_NUM(bar) ((bar) << 8) #define PCIE_ATU_LOWER_BASE 0x90C #define PCIE_ATU_UPPER_BASE 0x910 #define PCIE_ATU_LIMIT 0x914 @@ -52,6 +57,7 @@ /* LUT registers */ #define PCIE_LUT_BASE 0x80000 +#define PCIE_LUT_LCTRL0 0x7F8 #define PCIE_LUT_DBG 0x7FC #define PCIE_DBI_RO_WR_EN 0x8bc @@ -65,6 +71,25 @@ #define PCIE_DBI_SIZE 0x100000 /* 1M */ +#define PCIE_LCTRL0_CFG2_ENABLE (1 << 31) +#define PCIE_LCTRL0_VF(vf) ((vf) << 22) +#define PCIE_LCTRL0_PF(pf) ((pf) << 16) +#define PCIE_LCTRL0_VF_ACTIVE (1 << 21) +#define PCIE_LCTRL0_VAL(pf, vf) (PCIE_LCTRL0_PF(pf) | \ + PCIE_LCTRL0_VF(vf) | \ + ((vf) == 0 ? 0 : PCIE_LCTRL0_VF_ACTIVE) | \ + PCIE_LCTRL0_CFG2_ENABLE) + +#define PCIE_NO_SRIOV_BAR_BASE 0x1000 + +#define PCIE_PF_NUM 2 +#define PCIE_VF_NUM 64 + +#define PCIE_BAR0_SIZE (4 * 1024) /* 4K */ +#define PCIE_BAR1_SIZE (8 * 1024) /* 8K for MSIX */ +#define PCIE_BAR2_SIZE (4 * 1024) /* 4K */ +#define PCIE_BAR4_SIZE (1 * 1024 * 1024) /* 1M */ + struct ls_pcie { int idx; void __iomem *dbi; @@ -76,6 +101,7 @@ struct ls_pcie { struct ls_pcie_info { unsigned long regs; int pci_num; + u64 phys_base; u64 cfg0_phys; u64 cfg0_size; u64 cfg1_phys; @@ -91,6 +117,7 @@ struct ls_pcie_info { #define SET_LS_PCIE_INFO(x, num) \ { \ x.regs = CONFIG_SYS_PCIE##num##_ADDR; \ + x.phys_base = CONFIG_SYS_PCIE##num##_PHYS_ADDR; \ x.cfg0_phys = CONFIG_SYS_PCIE_CFG0_PHYS_OFF + \ CONFIG_SYS_PCIE##num##_PHYS_ADDR; \ x.cfg0_size = CONFIG_SYS_PCIE_CFG0_SIZE; \ @@ -197,6 +224,18 @@ static void ls_pcie_iatu_outbound_set(struct ls_pcie *pcie, int idx, int type, writel(PCIE_ATU_ENABLE, pcie->dbi + PCIE_ATU_CR2); } +/* Use bar match mode and MEM type as default */ +static void ls_pcie_iatu_inbound_set(struct ls_pcie *pcie, int idx, + int bar, u64 phys) +{ + writel(PCIE_ATU_REGION_INBOUND | idx, pcie->dbi + PCIE_ATU_VIEWPORT); + writel((u32)phys, pcie->dbi + PCIE_ATU_LOWER_TARGET); + writel(phys >> 32, pcie->dbi + PCIE_ATU_UPPER_TARGET); + writel(PCIE_ATU_TYPE_MEM, pcie->dbi + PCIE_ATU_CR1); + writel(PCIE_ATU_ENABLE | PCIE_ATU_BAR_MODE_ENABLE | + PCIE_ATU_BAR_NUM(bar), pcie->dbi + PCIE_ATU_CR2); +} + static void ls_pcie_setup_atu(struct ls_pcie *pcie, struct ls_pcie_info *info) { #ifdef DEBUG @@ -350,6 +389,97 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie, #endif } +static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie, + struct ls_pcie_info *info) +{ + u64 phys = CONFIG_SYS_PCI_EP_MEMORY_BASE; + + /* ATU 0 : INBOUND : map BAR0 */ + ls_pcie_iatu_inbound_set(pcie, PCIE_ATU_REGION_INDEX0, 0, phys); + /* ATU 1 : INBOUND : map BAR1 */ + phys += PCIE_BAR1_SIZE; + ls_pcie_iatu_inbound_set(pcie, PCIE_ATU_REGION_INDEX1, 1, phys); + /* ATU 2 : INBOUND : map BAR2 */ + phys += PCIE_BAR2_SIZE; + ls_pcie_iatu_inbound_set(pcie, PCIE_ATU_REGION_INDEX2, 2, phys); + /* ATU 3 : INBOUND : map BAR4 */ + phys = CONFIG_SYS_PCI_EP_MEMORY_BASE + PCIE_BAR4_SIZE; + ls_pcie_iatu_inbound_set(pcie, PCIE_ATU_REGION_INDEX3, 4, phys); + + /* ATU 0 : OUTBOUND : map 4G MEM */ + ls_pcie_iatu_outbound_set(pcie, PCIE_ATU_REGION_INDEX0, + PCIE_ATU_TYPE_MEM, + info->phys_base, + 0, + 4 * 1024 * 1024 * 1024ULL); +} + +/* BAR0 and BAR1 are 32bit BAR2 and BAR4 are 64bit */ +static void ls_pcie_ep_setup_bar(void *bar_base, int bar, u32 size) +{ + if (size < 4 * 1024) + return; + + switch (bar) { + case 0: + writel(size - 1, bar_base + PCI_BASE_ADDRESS_0); + break; + case 1: + writel(size - 1, bar_base + PCI_BASE_ADDRESS_1); + break; + case 2: + writel(size - 1, bar_base + PCI_BASE_ADDRESS_2); + writel(0, bar_base + PCI_BASE_ADDRESS_3); + break; + case 4: + writel(size - 1, bar_base + PCI_BASE_ADDRESS_4); + writel(0, bar_base + PCI_BASE_ADDRESS_5); + break; + default: + break; + } +} + +static void ls_pcie_ep_setup_bars(void *bar_base) +{ + /* BAR0 - 32bit - 4K configuration */ + ls_pcie_ep_setup_bar(bar_base, 0, PCIE_BAR0_SIZE); + /* BAR1 - 32bit - 8K MSIX*/ + ls_pcie_ep_setup_bar(bar_base, 1, PCIE_BAR1_SIZE); + /* BAR2 - 64bit - 4K MEM desciptor */ + ls_pcie_ep_setup_bar(bar_base, 2, PCIE_BAR2_SIZE); + /* BAR4 - 64bit - 1M MEM*/ + ls_pcie_ep_setup_bar(bar_base, 4, PCIE_BAR4_SIZE); +} + +static void ls_pcie_setup_ep(struct ls_pcie *pcie, struct ls_pcie_info *info) +{ + struct pci_controller *hose = &pcie->hose; + pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); + int sriov; + + sriov = pci_hose_find_ext_capability(hose, dev, PCI_EXT_CAP_ID_SRIOV); + if (sriov) { + int pf, vf; + + for (pf = 0; pf < PCIE_PF_NUM; pf++) { + for (vf = 0; vf <= PCIE_VF_NUM; vf++) { + writel(PCIE_LCTRL0_VAL(pf, vf), + pcie->dbi + PCIE_LUT_BASE + + PCIE_LUT_LCTRL0); + ls_pcie_ep_setup_bars(pcie->dbi); + ls_pcie_ep_setup_atu(pcie, info); + } + } + + /* Disable CFG2 */ + writel(0, pcie->dbi + PCIE_LUT_BASE + PCIE_LUT_LCTRL0); + } else { + ls_pcie_ep_setup_bars(pcie->dbi + PCIE_NO_SRIOV_BAR_BASE); + ls_pcie_ep_setup_atu(pcie, info); + } +} + int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info) { struct ls_pcie *pcie; @@ -426,6 +556,11 @@ int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info) printf("PCIe%u: %s ", info->pci_num, ep_mode ? "Endpoint" : "Root Complex"); + if (ep_mode) + ls_pcie_setup_ep(pcie, info); + else + ls_pcie_setup_ctrl(pcie, info); + linkup = ls_pcie_link_up(pcie); if (!linkup) { @@ -443,8 +578,6 @@ int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info) if (ep_mode) return busno; - ls_pcie_setup_ctrl(pcie, info); - pci_register_hose(hose); hose->last_busno = pci_hose_scan(hose); diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 84e1433..08620b2 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -313,9 +313,10 @@ static void qe_upload_microcode(const void *base, if (ucode->major || ucode->minor || ucode->revision) printf("QE: uploading microcode '%s' version %u.%u.%u\n", - ucode->id, ucode->major, ucode->minor, ucode->revision); + (char *)ucode->id, (u16)ucode->major, (u16)ucode->minor, + (u16)ucode->revision); else - printf("QE: uploading microcode '%s'\n", ucode->id); + printf("QE: uploading microcode '%s'\n", (char *)ucode->id); /* Use auto-increment */ out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) | @@ -434,7 +435,7 @@ int qe_upload_firmware(const struct qe_firmware *firmware) * saved microcode information and put in the new. */ memset(&qe_firmware_info, 0, sizeof(qe_firmware_info)); - strcpy(qe_firmware_info.id, (char *)firmware->id); + strncpy(qe_firmware_info.id, (char *)firmware->id, 62); qe_firmware_info.extended_modes = firmware->extended_modes; memcpy(qe_firmware_info.vtraps, firmware->vtraps, sizeof(firmware->vtraps)); diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 13f9338..0871a71 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -565,7 +565,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_LS102XA_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 12500000 -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index cf2aaa3..df7af3c 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -18,6 +18,10 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_DEEP_SLEEP +#ifdef CONFIG_DEEP_SLEEP +#define CONFIG_SILENT_CONSOLE +#endif /* * Size of malloc() pool @@ -95,6 +99,10 @@ #define DDR_DDR_ZQ_CNTL 0x89080600 #define DDR_CS0_CONFIG_2 0 #define DDR_SDRAM_CFG_MEM_EN 0x80000000 +#define SDRAM_CFG2_D_INIT 0x00000010 +#define DDR_CDR2_VREF_TRAIN_EN 0x00000080 +#define SDRAM_CFG2_FRC_SR 0x80000000 +#define SDRAM_CFG_BI 0x00000001 #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg @@ -121,7 +129,8 @@ #define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_TEXT_BASE 0x82000000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ + CONFIG_SYS_MONITOR_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 @@ -404,7 +413,6 @@ #define CONFIG_LS102XA_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_TIMER_CLK_FREQ 12500000 -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 @@ -499,6 +507,7 @@ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CMD_BLOB +#include <asm/fsl_secure_boot.h> #endif #endif diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h index a6ef356..91d4c5b 100644 --- a/include/configs/ls2085aqds.h +++ b/include/configs/ls2085aqds.h @@ -362,4 +362,17 @@ unsigned long get_board_ddr_clk(void); #endif +/* + * USB + */ +#define CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 + #endif /* __LS2_QDS_H */ diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index 41eb55b..4f8eb13 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -295,6 +295,19 @@ unsigned long get_board_sys_clk(void); #define CONFIG_MISC_INIT_R +/* + * USB + */ +#define CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 + /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/fsl-mc/fsl_dpbp.h b/include/fsl-mc/fsl_dpbp.h index 7f0075c..3cdc94e 100644 --- a/include/fsl-mc/fsl_dpbp.h +++ b/include/fsl-mc/fsl_dpbp.h @@ -15,7 +15,7 @@ /* DPBP Version */ #define DPBP_VER_MAJOR 2 -#define DPBP_VER_MINOR 0 +#define DPBP_VER_MINOR 1 /* Command IDs */ #define DPBP_CMDID_CLOSE 0x800 @@ -30,7 +30,7 @@ #define DPBP_CMD_OPEN(cmd, dpbp_id) \ MC_CMD_OP(cmd, 0, 0, 32, int, dpbp_id) -/* cmd, param, offset, width, type, arg_name */ +/* cmd, param, offset, width, type, arg_name */ #define DPBP_RSP_GET_ATTRIBUTES(cmd, attr) \ do { \ MC_RSP_OP(cmd, 0, 16, 16, uint16_t, attr->bpid); \ @@ -48,6 +48,7 @@ struct fsl_mc_io; /** * dpbp_open() - Open a control session for the specified object. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @dpbp_id: DPBP unique ID * @token: Returned token; use in subsequent API calls * @@ -61,11 +62,15 @@ struct fsl_mc_io; * * Return: '0' on Success; Error code otherwise. */ -int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token); +int dpbp_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int dpbp_id, + uint16_t *token); /** * dpbp_close() - Close the control session of the object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPBP object * * After this function is called, no further operations are @@ -73,35 +78,60 @@ int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token); * * Return: '0' on Success; Error code otherwise. */ -int dpbp_close(struct fsl_mc_io *mc_io, uint16_t token); +int dpbp_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * dpbp_enable() - Enable the DPBP. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPBP object * * Return: '0' on Success; Error code otherwise. */ - -int dpbp_enable(struct fsl_mc_io *mc_io, uint16_t token); +int dpbp_enable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * dpbp_disable() - Disable the DPBP. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPBP object * * Return: '0' on Success; Error code otherwise. */ -int dpbp_disable(struct fsl_mc_io *mc_io, uint16_t token); +int dpbp_disable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); + +/** + * dpbp_is_enabled() - Check if the DPBP is enabled. + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' + * @token: Token of DPBP object + * @en: Returns '1' if object is enabled; '0' otherwise + * + * Return: '0' on Success; Error code otherwise. + */ +int dpbp_is_enabled(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + int *en); /** * dpbp_reset() - Reset the DPBP, returns the object to initial state. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPBP object * * Return: '0' on Success; Error code otherwise. */ -int dpbp_reset(struct fsl_mc_io *mc_io, uint16_t token); +int dpbp_reset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); + /** * struct dpbp_attr - Structure representing DPBP attributes @@ -124,17 +154,18 @@ struct dpbp_attr { uint16_t bpid; }; - /** * dpbp_get_attributes - Retrieve DPBP attributes. * * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPBP object * @attr: Returned object's attributes * * Return: '0' on Success; Error code otherwise. */ int dpbp_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpbp_attr *attr); diff --git a/include/fsl-mc/fsl_dpio.h b/include/fsl-mc/fsl_dpio.h index e779909..9e83a2e 100644 --- a/include/fsl-mc/fsl_dpio.h +++ b/include/fsl-mc/fsl_dpio.h @@ -9,7 +9,7 @@ /* DPIO Version */ #define DPIO_VER_MAJOR 3 -#define DPIO_VER_MINOR 0 +#define DPIO_VER_MINOR 1 /* Command IDs */ #define DPIO_CMDID_CLOSE 0x800 @@ -46,6 +46,7 @@ struct fsl_mc_io; /** * dpio_open() - Open a control session for the specified object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @dpio_id: DPIO unique ID * @token: Returned token; use in subsequent API calls * @@ -59,16 +60,22 @@ struct fsl_mc_io; * * Return: '0' on Success; Error code otherwise. */ -int dpio_open(struct fsl_mc_io *mc_io, int dpio_id, uint16_t *token); +int dpio_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int dpio_id, + uint16_t *token); /** * dpio_close() - Close the control session of the object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPIO object * * Return: '0' on Success; Error code otherwise. */ -int dpio_close(struct fsl_mc_io *mc_io, uint16_t token); +int dpio_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * enum dpio_channel_mode - DPIO notification channel mode @@ -85,29 +92,38 @@ enum dpio_channel_mode { /** * dpio_enable() - Enable the DPIO, allow I/O portal operations. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPIO object * * Return: '0' on Success; Error code otherwise */ -int dpio_enable(struct fsl_mc_io *mc_io, uint16_t token); +int dpio_enable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * dpio_disable() - Disable the DPIO, stop any I/O portal operation. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPIO object * * Return: '0' on Success; Error code otherwise */ -int dpio_disable(struct fsl_mc_io *mc_io, uint16_t token); +int dpio_disable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * dpio_reset() - Reset the DPIO, returns the object to initial state. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPIO object * * Return: '0' on Success; Error code otherwise. */ -int dpio_reset(struct fsl_mc_io *mc_io, uint16_t token); +int dpio_reset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * struct dpio_attr - Structure representing DPIO attributes @@ -141,12 +157,14 @@ struct dpio_attr { /** * dpio_get_attributes() - Retrieve DPIO attributes * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPIO object * @attr: Returned object's attributes * * Return: '0' on Success; Error code otherwise */ int dpio_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpio_attr *attr); diff --git a/include/fsl-mc/fsl_dpmng.h b/include/fsl-mc/fsl_dpmng.h index 6feb292..b0a87a9 100644 --- a/include/fsl-mc/fsl_dpmng.h +++ b/include/fsl-mc/fsl_dpmng.h @@ -14,7 +14,7 @@ struct fsl_mc_io; /** * Management Complex firmware version information */ -#define MC_VER_MAJOR 7 +#define MC_VER_MAJOR 8 #define MC_VER_MINOR 0 /** @@ -35,10 +35,13 @@ struct mc_version { * mc_get_version() - Retrieves the Management Complex firmware * version information * @mc_io: Pointer to opaque I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @mc_ver_info: Returned version information structure * * Return: '0' on Success; Error code otherwise. */ -int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info); +int mc_get_version(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + struct mc_version *mc_ver_info); #endif /* __FSL_DPMNG_H */ diff --git a/include/fsl-mc/fsl_dpni.h b/include/fsl-mc/fsl_dpni.h index 26b67f0..e9a4712 100644 --- a/include/fsl-mc/fsl_dpni.h +++ b/include/fsl-mc/fsl_dpni.h @@ -8,7 +8,7 @@ /* DPNI Version */ #define DPNI_VER_MAJOR 5 -#define DPNI_VER_MINOR 0 +#define DPNI_VER_MINOR 1 /* Command IDs */ #define DPNI_CMDID_OPEN 0x801 @@ -324,6 +324,7 @@ do { \ MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dest_cfg.dest_id); \ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->dest_cfg.priority);\ MC_CMD_OP(cmd, 0, 40, 2, enum dpni_dest, cfg->dest_cfg.dest_type);\ + MC_CMD_OP(cmd, 0, 42, 1, int, cfg->order_preservation_en);\ MC_CMD_OP(cmd, 0, 48, 16, uint16_t, flow_id); \ MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx); \ MC_CMD_OP(cmd, 2, 16, 8, uint8_t, tc_id); \ @@ -350,6 +351,7 @@ do { \ MC_RSP_OP(cmd, 0, 0, 32, int, attr->dest_cfg.dest_id); \ MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->dest_cfg.priority);\ MC_RSP_OP(cmd, 0, 40, 2, enum dpni_dest, attr->dest_cfg.dest_type); \ + MC_CMD_OP(cmd, 0, 42, 1, int, attr->order_preservation_en);\ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, attr->user_ctx); \ MC_RSP_OP(cmd, 2, 32, 32, uint32_t, attr->fqid); \ MC_RSP_OP(cmd, 3, 0, 4, enum dpni_flc_type, attr->flc_cfg.flc_type); \ @@ -439,6 +441,7 @@ struct fsl_mc_io; /** * dpni_open() - Open a control session for the specified object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @dpni_id: DPNI unique ID * @token: Returned token; use in subsequent API calls * @@ -452,11 +455,15 @@ struct fsl_mc_io; * * Return: '0' on Success; Error code otherwise. */ -int dpni_open(struct fsl_mc_io *mc_io, int dpni_id, uint16_t *token); +int dpni_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int dpni_id, + uint16_t *token); /** * dpni_close() - Close the control session of the object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * * After this function is called, no further operations are @@ -464,7 +471,9 @@ int dpni_open(struct fsl_mc_io *mc_io, int dpni_id, uint16_t *token); * * Return: '0' on Success; Error code otherwise. */ -int dpni_close(struct fsl_mc_io *mc_io, uint16_t token); +int dpni_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * struct dpni_ipr_cfg - Structure representing IP reassembly configuration @@ -494,16 +503,19 @@ struct dpni_pools_cfg { * struct pools - Buffer pools parameters * @dpbp_id: DPBP object ID * @buffer_size: Buffer size + * @backup_pool: Backup pool */ struct { - int dpbp_id; - uint16_t buffer_size; + int dpbp_id; + uint16_t buffer_size; + int backup_pool; } pools[DPNI_MAX_DPBP]; }; /** * dpni_set_pools() - Set buffer pools configuration * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @cfg: Buffer pools configuration * @@ -513,36 +525,46 @@ struct dpni_pools_cfg { * Return: '0' on Success; Error code otherwise. */ int dpni_set_pools(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_pools_cfg *cfg); /** * dpni_enable() - Enable the DPNI, allow sending and receiving frames. - * @mc_io: Pointer to MC portal's I/O object + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * * Return: '0' on Success; Error code otherwise. */ -int dpni_enable(struct fsl_mc_io *mc_io, uint16_t token); +int dpni_enable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * dpni_disable() - Disable the DPNI, stop sending and receiving frames. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * * Return: '0' on Success; Error code otherwise. */ -int dpni_disable(struct fsl_mc_io *mc_io, uint16_t token); +int dpni_disable(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** - * @dpni_reset() - Reset the DPNI, returns the object to initial state. + * dpni_reset() - Reset the DPNI, returns the object to initial state. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * * Return: '0' on Success; Error code otherwise. */ -int dpni_reset(struct fsl_mc_io *mc_io, uint16_t token); +int dpni_reset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * struct dpni_attr - Structure representing DPNI attributes @@ -595,13 +617,15 @@ struct dpni_attr { /** * dpni_get_attributes() - Retrieve DPNI attributes. - * @mc_io: Pointer to MC portal's I/O objec + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @attr: Returned object's attributes * * Return: '0' on Success; Error code otherwise. */ int dpni_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_attr *attr); @@ -648,18 +672,21 @@ struct dpni_buffer_layout { /** * dpni_get_rx_buffer_layout() - Retrieve Rx buffer layout attributes. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @layout: Returns buffer layout attributes * * Return: '0' on Success; Error code otherwise. */ int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_buffer_layout *layout); /** * dpni_set_rx_buffer_layout() - Set Rx buffer layout configuration. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @layout: Buffer layout configuration * @@ -668,24 +695,28 @@ int dpni_get_rx_buffer_layout(struct fsl_mc_io *mc_io, * @warning Allowed only when DPNI is disabled */ int dpni_set_rx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_buffer_layout *layout); /** * dpni_get_tx_buffer_layout() - Retrieve Tx buffer layout attributes. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @layout: Returns buffer layout attributes * * Return: '0' on Success; Error code otherwise. */ int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_buffer_layout *layout); /** * dpni_set_tx_buffer_layout() - Set Tx buffer layout configuration. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @layout: Buffer layout configuration * @@ -694,6 +725,7 @@ int dpni_get_tx_buffer_layout(struct fsl_mc_io *mc_io, * @warning Allowed only when DPNI is disabled */ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_buffer_layout *layout); @@ -701,12 +733,14 @@ int dpni_set_tx_buffer_layout(struct fsl_mc_io *mc_io, * dpni_get_tx_conf_buffer_layout() - Retrieve Tx confirmation buffer layout * attributes. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @layout: Returns buffer layout attributes * * Return: '0' on Success; Error code otherwise. */ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dpni_buffer_layout *layout); @@ -714,6 +748,7 @@ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, * dpni_set_tx_conf_buffer_layout() - Set Tx confirmation buffer layout * configuration. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @layout: Buffer layout configuration * @@ -722,6 +757,7 @@ int dpni_get_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, * @warning Allowed only when DPNI is disabled */ int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dpni_buffer_layout *layout); @@ -729,23 +765,29 @@ int dpni_set_tx_conf_buffer_layout(struct fsl_mc_io *mc_io, * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used * for enqueue operations * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @qdid: Returned virtual QDID value that should be used as an argument * in all enqueue operations * * Return: '0' on Success; Error code otherwise. */ -int dpni_get_qdid(struct fsl_mc_io *mc_io, uint16_t token, uint16_t *qdid); +int dpni_get_qdid(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + uint16_t *qdid); /** * dpni_get_tx_data_offset() - Get the Tx data offset (from start of buffer) * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @data_offset: Tx data offset (from start of buffer) * * Return: '0' on Success; Error code otherwise. */ int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint16_t *data_offset); @@ -781,6 +823,7 @@ enum dpni_counter { /** * dpni_get_counter() - Read a specific DPNI counter * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @counter: The requested counter * @value: Returned counter's current value @@ -788,6 +831,7 @@ enum dpni_counter { * Return: '0' on Success; Error code otherwise. */ int dpni_get_counter(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, enum dpni_counter counter, uint64_t *value); @@ -795,6 +839,7 @@ int dpni_get_counter(struct fsl_mc_io *mc_io, /** * dpni_set_counter() - Set (or clear) a specific DPNI counter * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @counter: The requested counter * @value: New counter value; typically pass '0' for resetting @@ -803,6 +848,7 @@ int dpni_get_counter(struct fsl_mc_io *mc_io, * Return: '0' on Success; Error code otherwise. */ int dpni_set_counter(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, enum dpni_counter counter, uint64_t value); @@ -829,14 +875,16 @@ struct dpni_link_cfg { /** * dpni_set_link_cfg() - set the link configuration. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @cfg: Link configuration * * Return: '0' on Success; Error code otherwise. */ -int dpni_set_link_cfg(struct fsl_mc_io *mc_io, - uint16_t token, - const struct dpni_link_cfg *cfg); +int dpni_set_link_cfg(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + const struct dpni_link_cfg *cfg); /** * struct dpni_link_state - Structure representing DPNI link state @@ -853,60 +901,70 @@ struct dpni_link_state { /** * dpni_get_link_state() - Return the link state (either up or down) * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @state: Returned link state; * * Return: '0' on Success; Error code otherwise. */ -int dpni_get_link_state(struct fsl_mc_io *mc_io, - uint16_t token, - struct dpni_link_state *state); +int dpni_get_link_state(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + struct dpni_link_state *state); /** * dpni_set_primary_mac_addr() - Set the primary MAC address * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @mac_addr: MAC address to set as primary address * * Return: '0' on Success; Error code otherwise. */ -int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, +int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const uint8_t mac_addr[6]); /** * dpni_get_primary_mac_addr() - Get the primary MAC address * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @mac_addr: Returned MAC address * * Return: '0' on Success; Error code otherwise. */ int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint8_t mac_addr[6]); /** * dpni_add_mac_addr() - Add MAC address filter * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @mac_addr: MAC address to add * * Return: '0' on Success; Error code otherwise. */ int dpni_add_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const uint8_t mac_addr[6]); /** * dpni_remove_mac_addr() - Remove MAC address filter * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @mac_addr: MAC address to remove * * Return: '0' on Success; Error code otherwise. */ int dpni_remove_mac_addr(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const uint8_t mac_addr[6]); @@ -1005,7 +1063,8 @@ struct dpni_flc_cfg { * not applicable for Tx-conf/Err queues as the FD comes from the user */ #define DPNI_QUEUE_OPT_FLC 0x00000004 - +/* Select to modify the queue's order preservation */ +#define DPNI_QUEUE_OPT_ORDER_PRESERVATION 0x00000008 /** * struct dpni_queue_cfg - Structure representing queue configuration @@ -1021,12 +1080,16 @@ struct dpni_flc_cfg { * in the case of FS (flow-steering) the flow's FLC settings * are used. * valid only if 'DPNI_QUEUE_OPT_FLC' is contained in 'options' + * @order_preservation_en: enable/disable order preservation; + * valid only if 'DPNI_QUEUE_OPT_ORDER_PRESERVATION' is contained + * in 'options' */ struct dpni_queue_cfg { uint32_t options; uint64_t user_ctx; struct dpni_dest_cfg dest_cfg; struct dpni_flc_cfg flc_cfg; + int order_preservation_en; }; /** @@ -1035,12 +1098,14 @@ struct dpni_queue_cfg { * dequeued frame * @dest_cfg: Queue destination configuration * @flc_cfg: Flow context configuration + * @order_preservation_en: enable/disable order preservation * @fqid: Virtual fqid value to be used for dequeue operations */ struct dpni_queue_attr { uint64_t user_ctx; struct dpni_dest_cfg dest_cfg; struct dpni_flc_cfg flc_cfg; + int order_preservation_en; uint32_t fqid; }; @@ -1100,6 +1165,7 @@ struct dpni_tx_flow_cfg { /** * dpni_set_tx_flow() - Set Tx flow configuration * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @flow_id: Provides (or returns) the sender's flow ID; * for each new sender set (*flow_id) to @@ -1111,6 +1177,7 @@ struct dpni_tx_flow_cfg { * Return: '0' on Success; Error code otherwise. */ int dpni_set_tx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint16_t *flow_id, const struct dpni_tx_flow_cfg *cfg); @@ -1144,6 +1211,7 @@ struct dpni_tx_flow_attr { /** * dpni_get_tx_flow() - Get Tx flow attributes * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @flow_id: The sender's flow ID, as returned by the * dpni_set_tx_flow() function @@ -1152,6 +1220,7 @@ struct dpni_tx_flow_attr { * Return: '0' on Success; Error code otherwise. */ int dpni_get_tx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint16_t flow_id, struct dpni_tx_flow_attr *attr); @@ -1159,10 +1228,11 @@ int dpni_get_tx_flow(struct fsl_mc_io *mc_io, /** * dpni_set_rx_flow() - Set Rx flow configuration * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @tc_id: Traffic class selection (0-7); * use 'DPNI_ALL_TCS' to set all TCs and all flows - * @flow_id Rx flow id within the traffic class; use + * @flow_id: Rx flow id within the traffic class; use * 'DPNI_ALL_TC_FLOWS' to set all flows within * this tc_id; ignored if tc_id is set to * 'DPNI_ALL_TCS'; @@ -1171,6 +1241,7 @@ int dpni_get_tx_flow(struct fsl_mc_io *mc_io, * Return: '0' on Success; Error code otherwise. */ int dpni_set_rx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint8_t tc_id, uint16_t flow_id, @@ -1179,6 +1250,7 @@ int dpni_set_rx_flow(struct fsl_mc_io *mc_io, /** * dpni_get_rx_flow() - Get Rx flow attributes * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPNI object * @tc_id: Traffic class selection (0-7) * @flow_id: Rx flow id within the traffic class @@ -1187,6 +1259,7 @@ int dpni_set_rx_flow(struct fsl_mc_io *mc_io, * Return: '0' on Success; Error code otherwise. */ int dpni_get_rx_flow(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, uint8_t tc_id, uint16_t flow_id, diff --git a/include/fsl-mc/fsl_dprc.h b/include/fsl-mc/fsl_dprc.h index 26a4598..b2cd2cb 100644 --- a/include/fsl-mc/fsl_dprc.h +++ b/include/fsl-mc/fsl_dprc.h @@ -10,7 +10,7 @@ #define _FSL_DPRC_H /* DPRC Version */ -#define DPRC_VER_MAJOR 4 +#define DPRC_VER_MAJOR 5 #define DPRC_VER_MINOR 0 /* Command IDs */ @@ -191,14 +191,16 @@ do { \ /* param, offset, width, type, arg_name */ #define DPRC_RSP_GET_OBJ_REGION(cmd, region_desc) \ do { \ - MC_RSP_OP(cmd, 1, 0, 64, uint64_t, region_desc->base_offset);\ + MC_RSP_OP(cmd, 1, 0, 32, uint32_t, region_desc->base_offset);\ MC_RSP_OP(cmd, 2, 0, 32, uint32_t, region_desc->size); \ + MC_RSP_OP(cmd, 2, 32, 4, enum dprc_region_type, region_desc->type);\ + MC_RSP_OP(cmd, 3, 0, 32, uint32_t, region_desc->flags);\ } while (0) /* cmd, param, offset, width, type, arg_name */ -#define DPRC_CMD_SET_OBJ_LABEL(cmd, obj_index, label) \ +#define DPRC_CMD_SET_OBJ_LABEL(cmd, obj_type, obj_id, label) \ do { \ - MC_CMD_OP(cmd, 0, 0, 32, int, obj_index); \ + MC_CMD_OP(cmd, 0, 0, 32, int, obj_id); \ MC_CMD_OP(cmd, 1, 0, 8, char, label[0]);\ MC_CMD_OP(cmd, 1, 8, 8, char, label[1]);\ MC_CMD_OP(cmd, 1, 16, 8, char, label[2]);\ @@ -215,15 +217,31 @@ do { \ MC_CMD_OP(cmd, 2, 40, 8, char, label[13]);\ MC_CMD_OP(cmd, 2, 48, 8, char, label[14]);\ MC_CMD_OP(cmd, 2, 56, 8, char, label[15]);\ + MC_CMD_OP(cmd, 3, 0, 8, char, obj_type[0]);\ + MC_CMD_OP(cmd, 3, 8, 8, char, obj_type[1]);\ + MC_CMD_OP(cmd, 3, 16, 8, char, obj_type[2]);\ + MC_CMD_OP(cmd, 3, 24, 8, char, obj_type[3]);\ + MC_CMD_OP(cmd, 3, 32, 8, char, obj_type[4]);\ + MC_CMD_OP(cmd, 3, 40, 8, char, obj_type[5]);\ + MC_CMD_OP(cmd, 3, 48, 8, char, obj_type[6]);\ + MC_CMD_OP(cmd, 3, 56, 8, char, obj_type[7]);\ + MC_CMD_OP(cmd, 4, 0, 8, char, obj_type[8]);\ + MC_CMD_OP(cmd, 4, 8, 8, char, obj_type[9]);\ + MC_CMD_OP(cmd, 4, 16, 8, char, obj_type[10]);\ + MC_CMD_OP(cmd, 4, 24, 8, char, obj_type[11]);\ + MC_CMD_OP(cmd, 4, 32, 8, char, obj_type[12]);\ + MC_CMD_OP(cmd, 4, 40, 8, char, obj_type[13]);\ + MC_CMD_OP(cmd, 4, 48, 8, char, obj_type[14]);\ + MC_CMD_OP(cmd, 4, 56, 8, char, obj_type[15]);\ } while (0) /* cmd, param, offset, width, type, arg_name */ -#define DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2) \ +#define DPRC_CMD_CONNECT(cmd, endpoint1, endpoint2, cfg) \ do { \ MC_CMD_OP(cmd, 0, 0, 32, int, endpoint1->id); \ - MC_CMD_OP(cmd, 0, 32, 32, int, endpoint1->interface_id); \ + MC_CMD_OP(cmd, 0, 32, 16, uint16_t, endpoint1->if_id); \ MC_CMD_OP(cmd, 1, 0, 32, int, endpoint2->id); \ - MC_CMD_OP(cmd, 1, 32, 32, int, endpoint2->interface_id); \ + MC_CMD_OP(cmd, 1, 32, 16, uint16_t, endpoint2->if_id); \ MC_CMD_OP(cmd, 2, 0, 8, char, endpoint1->type[0]); \ MC_CMD_OP(cmd, 2, 8, 8, char, endpoint1->type[1]); \ MC_CMD_OP(cmd, 2, 16, 8, char, endpoint1->type[2]); \ @@ -240,6 +258,8 @@ do { \ MC_CMD_OP(cmd, 3, 40, 8, char, endpoint1->type[13]); \ MC_CMD_OP(cmd, 3, 48, 8, char, endpoint1->type[14]); \ MC_CMD_OP(cmd, 3, 56, 8, char, endpoint1->type[15]); \ + MC_CMD_OP(cmd, 4, 0, 32, uint32_t, cfg->max_rate); \ + MC_CMD_OP(cmd, 4, 32, 32, uint32_t, cfg->committed_rate); \ MC_CMD_OP(cmd, 5, 0, 8, char, endpoint2->type[0]); \ MC_CMD_OP(cmd, 5, 8, 8, char, endpoint2->type[1]); \ MC_CMD_OP(cmd, 5, 16, 8, char, endpoint2->type[2]); \ @@ -262,7 +282,7 @@ do { \ #define DPRC_CMD_DISCONNECT(cmd, endpoint) \ do { \ MC_CMD_OP(cmd, 0, 0, 32, int, endpoint->id); \ - MC_CMD_OP(cmd, 0, 32, 32, int, endpoint->interface_id); \ + MC_CMD_OP(cmd, 0, 32, 16, uint16_t, endpoint->if_id); \ MC_CMD_OP(cmd, 1, 0, 8, char, endpoint->type[0]); \ MC_CMD_OP(cmd, 1, 8, 8, char, endpoint->type[1]); \ MC_CMD_OP(cmd, 1, 16, 8, char, endpoint->type[2]); \ @@ -285,7 +305,7 @@ do { \ #define DPRC_CMD_GET_CONNECTION(cmd, endpoint1) \ do { \ MC_CMD_OP(cmd, 0, 0, 32, int, endpoint1->id); \ - MC_CMD_OP(cmd, 0, 32, 32, int, endpoint1->interface_id); \ + MC_CMD_OP(cmd, 0, 32, 16, uint16_t, endpoint1->if_id); \ MC_CMD_OP(cmd, 1, 0, 8, char, endpoint1->type[0]); \ MC_CMD_OP(cmd, 1, 8, 8, char, endpoint1->type[1]); \ MC_CMD_OP(cmd, 1, 16, 8, char, endpoint1->type[2]); \ @@ -304,12 +324,11 @@ do { \ MC_CMD_OP(cmd, 2, 56, 8, char, endpoint1->type[15]); \ } while (0) - /* cmd, param, offset, width, type, arg_name */ #define DPRC_RSP_GET_CONNECTION(cmd, endpoint2, state) \ do { \ MC_RSP_OP(cmd, 3, 0, 32, int, endpoint2->id); \ - MC_RSP_OP(cmd, 3, 32, 32, int, endpoint2->interface_id); \ + MC_RSP_OP(cmd, 3, 32, 16, uint16_t, endpoint2->if_id); \ MC_RSP_OP(cmd, 4, 0, 8, char, endpoint2->type[0]); \ MC_RSP_OP(cmd, 4, 8, 8, char, endpoint2->type[1]); \ MC_RSP_OP(cmd, 4, 16, 8, char, endpoint2->type[2]); \ @@ -351,16 +370,20 @@ struct fsl_mc_io; /** * dprc_get_container_id() - Get container ID associated with a given portal. - * @mc_io: Pointer to MC portal's I/O object + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @container_id: Requested container ID * * Return: '0' on Success; Error code otherwise. */ -int dprc_get_container_id(struct fsl_mc_io *mc_io, int *container_id); +int dprc_get_container_id(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int *container_id); /** * dprc_open() - Open DPRC object for use * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @container_id: Container ID to open * @token: Returned token of DPRC object * @@ -368,11 +391,15 @@ int dprc_get_container_id(struct fsl_mc_io *mc_io, int *container_id); * * @warning Required before any operation on the object. */ -int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token); +int dprc_open(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + int container_id, + uint16_t *token); /** * dprc_close() - Close the control session of the object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * * After this function is called, no further operations are @@ -380,7 +407,9 @@ int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token); * * Return: '0' on Success; Error code otherwise. */ -int dprc_close(struct fsl_mc_io *mc_io, uint16_t token); +int dprc_close(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token); /** * Container general options @@ -440,6 +469,7 @@ struct dprc_cfg { /** * dprc_reset_container - Reset child container. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @child_container_id: ID of the container to reset * @@ -458,9 +488,10 @@ struct dprc_cfg { * * Return: '0' on Success; Error code otherwise. */ -int dprc_reset_container(struct fsl_mc_io *mc_io, - uint16_t token, - int child_container_id); +int dprc_reset_container(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + int child_container_id); /** * struct dprc_attributes - Container attributes @@ -489,24 +520,30 @@ struct dprc_attributes { /** * dprc_get_attributes() - Obtains container attributes * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object - * @attributes Returned container attributes + * @attributes: Returned container attributes * * Return: '0' on Success; Error code otherwise. */ int dprc_get_attributes(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, struct dprc_attributes *attributes); /** * dprc_get_obj_count() - Obtains the number of objects in the DPRC * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @obj_count: Number of objects assigned to the DPRC * * Return: '0' on Success; Error code otherwise. */ -int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count); +int dprc_get_obj_count(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + int *obj_count); /* Objects Attributes Flags */ @@ -542,6 +579,7 @@ struct dprc_obj_desc { /** * dprc_get_obj() - Get general information on an object * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @obj_index: Index of the object to be queried (< obj_count) * @obj_desc: Returns the requested object descriptor @@ -554,6 +592,7 @@ struct dprc_obj_desc { * Return: '0' on Success; Error code otherwise. */ int dprc_get_obj(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, int obj_index, struct dprc_obj_desc *obj_desc); @@ -562,6 +601,7 @@ int dprc_get_obj(struct fsl_mc_io *mc_io, * dprc_get_res_count() - Obtains the number of free resources that are * assigned to this container, by pool type * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @type: pool type * @res_count: Returned number of free resources of the given @@ -569,7 +609,8 @@ int dprc_get_obj(struct fsl_mc_io *mc_io, * * Return: '0' on Success; Error code otherwise. */ -int dprc_get_res_count(struct fsl_mc_io *mc_io, +int dprc_get_res_count(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, char *type, int *res_count); @@ -604,6 +645,7 @@ struct dprc_res_ids_range_desc { /** * dprc_get_res_ids() - Obtains IDs of free resources in the container * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @type: pool type * @range_desc: range descriptor @@ -611,10 +653,25 @@ struct dprc_res_ids_range_desc { * Return: '0' on Success; Error code otherwise. */ int dprc_get_res_ids(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, char *type, struct dprc_res_ids_range_desc *range_desc); +/* Region flags */ +/* Cacheable - Indicates that region should be mapped as cacheable */ +#define DPRC_REGION_CACHEABLE 0x00000001 + +/** + * enum dprc_region_type - Region type + * @DPRC_REGION_TYPE_MC_PORTAL: MC portal region + * @DPRC_REGION_TYPE_QBMAN_PORTAL: Qbman portal region + */ +enum dprc_region_type { + DPRC_REGION_TYPE_MC_PORTAL, + DPRC_REGION_TYPE_QBMAN_PORTAL +}; + /** * struct dprc_region_desc - Mappable region descriptor * @base_offset: Region offset from region's base address. @@ -622,17 +679,22 @@ int dprc_get_res_ids(struct fsl_mc_io *mc_io, * base address; For DPIO, region base is offset from SoC QMan portals * base address * @size: Region size (in bytes) + * @flags: Region attributes + * @type: Portal region type */ struct dprc_region_desc { - uint64_t base_offset; + uint32_t base_offset; uint32_t size; + uint32_t flags; + enum dprc_region_type type; }; /** * dprc_get_obj_region() - Get region information for a specified object. * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object - * @obj_type; Object type as returned in dprc_get_obj() + * @obj_type: Object type as returned in dprc_get_obj() * @obj_id: Unique object instance as returned in dprc_get_obj() * @region_index: The specific region to query * @region_desc: Returns the requested region descriptor @@ -640,6 +702,7 @@ struct dprc_region_desc { * Return: '0' on Success; Error code otherwise. */ int dprc_get_obj_region(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, char *obj_type, int obj_id, @@ -650,53 +713,74 @@ int dprc_get_obj_region(struct fsl_mc_io *mc_io, * operations * @type: Endpoint object type: NULL terminated string * @id: Endpoint object ID - * @interface_id: Interface ID; should be set for endpoints with multiple + * @if_id: Interface ID; should be set for endpoints with multiple * interfaces ("dpsw", "dpdmux"); for others, always set to 0 */ struct dprc_endpoint { - char type[16]; - int id; - int interface_id; + char type[16]; + int id; + uint16_t if_id; +}; + +/** + * struct dprc_connection_cfg - Connection configuration. + * Used for virtual connections only + * @committed_rate: Committed rate (Mbits/s) + * @max_rate: Maximum rate (Mbits/s) + */ +struct dprc_connection_cfg { + uint32_t committed_rate; + uint32_t max_rate; }; /** * dprc_connect() - Connect two endpoints to create a network link between them * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @endpoint1: Endpoint 1 configuration parameters * @endpoint2: Endpoint 2 configuration parameters + * @cfg: Connection configuration. The connection configuration is ignored for + * connections made to DPMAC objects, where rate is retrieved from the + * MAC configuration. * * Return: '0' on Success; Error code otherwise. */ -int dprc_connect(struct fsl_mc_io *mc_io, - uint16_t token, - const struct dprc_endpoint *endpoint1, - const struct dprc_endpoint *endpoint2); +int dprc_connect(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, + uint16_t token, + const struct dprc_endpoint *endpoint1, + const struct dprc_endpoint *endpoint2, + const struct dprc_connection_cfg *cfg); /** * dprc_disconnect() - Disconnect one endpoint to remove its network connection * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' * @token: Token of DPRC object * @endpoint: Endpoint configuration parameters * * Return: '0' on Success; Error code otherwise. */ int dprc_disconnect(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dprc_endpoint *endpoint); /** * dprc_get_connection() - Get connected endpoint and link status if connection * exists. -* @mc_io Pointer to MC portal's I/O object -* @token Token of DPRC object -* @endpoint1 Endpoint 1 configuration parameters -* @endpoint2 Returned endpoint 2 configuration parameters +* @mc_io: Pointer to MC portal's I/O object +* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' +* @token: Token of DPRC object +* @endpoint1: Endpoint 1 configuration parameters +* @endpoint2: Returned endpoint 2 configuration parameters * @state: Returned link state: 1 - link is up, 0 - link is down * * Return: '0' on Success; -ENAVAIL if connection does not exist. */ int dprc_get_connection(struct fsl_mc_io *mc_io, + uint32_t cmd_flags, uint16_t token, const struct dprc_endpoint *endpoint1, struct dprc_endpoint *endpoint2, diff --git a/include/fsl-mc/fsl_mc_cmd.h b/include/fsl-mc/fsl_mc_cmd.h index cb39c39..7f87d4e 100644 --- a/include/fsl-mc/fsl_mc_cmd.h +++ b/include/fsl-mc/fsl_mc_cmd.h @@ -10,11 +10,11 @@ #define MAKE_UMASK64(_width) \ ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1)) -static inline uint64_t u64_enc(int lsoffset, int width, uint64_t val) +static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val) { return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset); } -static inline uint64_t u64_dec(uint64_t val, int lsoffset, int width) +static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width) { return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width)); } @@ -39,44 +39,55 @@ enum mc_cmd_status { MC_CMD_STATUS_INVALID_STATE = 0xC /*!< Invalid state */ }; +/* + * MC command flags + */ + +/* High priority flag */ +#define MC_CMD_FLAG_PRI 0x00008000 +/* No flags */ +#define MC_CMD_NO_FLAGS 0x00000000 +/* Command completion flag */ +#define MC_CMD_FLAG_INTR_DIS 0x01000000 + + #define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */ #define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */ #define MC_CMD_HDR_STATUS_O 16 /* Status field offset */ #define MC_CMD_HDR_TOKEN_O 38 /* Token field offset */ #define MC_CMD_HDR_TOKEN_S 10 /* Token field size */ #define MC_CMD_HDR_STATUS_S 8 /* Status field size*/ -#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */ -#define MC_CMD_HDR_PRI_S 1 /* Priority field size */ +#define MC_CMD_HDR_FLAGS_O 0 /* Flags field offset */ +#define MC_CMD_HDR_FLAGS_S 32 /* Flags field size*/ +#define MC_CMD_HDR_FLAGS_MASK 0xFF00FF00 /* Command flags mask */ #define MC_CMD_HDR_READ_STATUS(_hdr) \ - ((enum mc_cmd_status)u64_dec((_hdr), \ + ((enum mc_cmd_status)mc_dec((_hdr), \ MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S)) #define MC_CMD_HDR_READ_TOKEN(_hdr) \ - ((uint16_t)u64_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S)) - -#define MC_CMD_PRI_LOW 0 /*!< Low Priority command indication */ -#define MC_CMD_PRI_HIGH 1 /*!< High Priority command indication */ + ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S)) #define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \ - ((_ext)[_param] |= u64_enc((_offset), (_width), _arg)) + ((_ext)[_param] |= mc_enc((_offset), (_width), _arg)) #define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \ - ((_cmd).params[_param] |= u64_enc((_offset), (_width), _arg)) + ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg)) #define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \ - (_arg = (_type)u64_dec(_cmd.params[_param], (_offset), (_width))) + (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width))) static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id, - uint8_t priority, + uint32_t cmd_flags, uint16_t token) { uint64_t hdr; - hdr = u64_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id); - hdr |= u64_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token); - hdr |= u64_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority); - hdr |= u64_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S, + hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id); + hdr |= mc_enc(MC_CMD_HDR_FLAGS_O, MC_CMD_HDR_FLAGS_S, + (cmd_flags & MC_CMD_HDR_FLAGS_MASK)); + hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token); + hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S, MC_CMD_STATUS_READY); return hdr; @@ -130,6 +141,4 @@ static inline enum mc_cmd_status mc_read_response( return status; } -int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd); - #endif /* __FSL_MC_CMD_H */ diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 728503b..1ac092b 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -103,7 +103,7 @@ unsigned int compute_lowest_common_dimm_parameters( const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms); -unsigned int populate_memctl_options(int all_dimms_registered, +unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num); diff --git a/include/fsl_sec.h b/include/fsl_sec.h index ebb1ac6..672bcef 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -32,10 +32,20 @@ /* RNG4 TRNG test registers */ struct rng4tst { #define RTMCTL_PRGM 0x00010000 /* 1 -> program mode, 0 -> run mode */ +#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_SC 0 /* use von Neumann data in + both entropy shifter and + statistical checker */ +#define RTMCTL_SAMP_MODE_RAW_ES_SC 1 /* use raw data in both + entropy shifter and + statistical checker */ +#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_RAW_SC 2 /* use von Neumann data in + entropy shifter, raw data + in statistical checker */ +#define RTMCTL_SAMP_MODE_INVALID 3 /* invalid combination */ u32 rtmctl; /* misc. control register */ u32 rtscmisc; /* statistical check misc. register */ u32 rtpkrrng; /* poker range register */ -#define RTSDCTL_ENT_DLY_MIN 1200 +#define RTSDCTL_ENT_DLY_MIN 3200 #define RTSDCTL_ENT_DLY_MAX 12800 union { u32 rtpkrmax; /* PRGM=1: poker max. limit register */ @@ -49,6 +59,7 @@ struct rng4tst { u32 rttotsam; /* PRGM=0: total samples register */ }; u32 rtfreqmin; /* frequency count min. limit register */ +#define RTFRQMAX_DISABLE (1 << 20) union { u32 rtfreqmax; /* PRGM=1: freq. count max. limit register */ u32 rtfreqcnt; /* PRGM=0: freq. count register */ diff --git a/include/pci.h b/include/pci.h index 94bca97..dce159f 100644 --- a/include/pci.h +++ b/include/pci.h @@ -11,6 +11,9 @@ #ifndef _PCI_H #define _PCI_H +#define PCI_CFG_SPACE_SIZE 256 +#define PCI_CFG_SPACE_EXP_SIZE 4096 + /* * Under PCI, each device has 256 bytes of configuration address space, * of which the first 64 bytes are standardized as follows: @@ -413,6 +416,39 @@ #define PCI_FIND_CAP_TTL 0x48 #define CAP_START_POS 0x40 +/* Extended Capabilities (PCI-X 2.0 and Express) */ +#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) +#define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf) +#define PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc) + +#define PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error Reporting */ +#define PCI_EXT_CAP_ID_VC 0x02 /* Virtual Channel Capability */ +#define PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ +#define PCI_EXT_CAP_ID_PWR 0x04 /* Power Budgeting */ +#define PCI_EXT_CAP_ID_RCLD 0x05 /* Root Complex Link Declaration */ +#define PCI_EXT_CAP_ID_RCILC 0x06 /* Root Complex Internal Link Control */ +#define PCI_EXT_CAP_ID_RCEC 0x07 /* Root Complex Event Collector */ +#define PCI_EXT_CAP_ID_MFVC 0x08 /* Multi-Function VC Capability */ +#define PCI_EXT_CAP_ID_VC9 0x09 /* same as _VC */ +#define PCI_EXT_CAP_ID_RCRB 0x0A /* Root Complex RB? */ +#define PCI_EXT_CAP_ID_VNDR 0x0B /* Vendor-Specific */ +#define PCI_EXT_CAP_ID_CAC 0x0C /* Config Access - obsolete */ +#define PCI_EXT_CAP_ID_ACS 0x0D /* Access Control Services */ +#define PCI_EXT_CAP_ID_ARI 0x0E /* Alternate Routing ID */ +#define PCI_EXT_CAP_ID_ATS 0x0F /* Address Translation Services */ +#define PCI_EXT_CAP_ID_SRIOV 0x10 /* Single Root I/O Virtualization */ +#define PCI_EXT_CAP_ID_MRIOV 0x11 /* Multi Root I/O Virtualization */ +#define PCI_EXT_CAP_ID_MCAST 0x12 /* Multicast */ +#define PCI_EXT_CAP_ID_PRI 0x13 /* Page Request Interface */ +#define PCI_EXT_CAP_ID_AMD_XXX 0x14 /* Reserved for AMD */ +#define PCI_EXT_CAP_ID_REBAR 0x15 /* Resizable BAR */ +#define PCI_EXT_CAP_ID_DPA 0x16 /* Dynamic Power Allocation */ +#define PCI_EXT_CAP_ID_TPH 0x17 /* TPH Requester */ +#define PCI_EXT_CAP_ID_LTR 0x18 /* Latency Tolerance Reporting */ +#define PCI_EXT_CAP_ID_SECPCI 0x19 /* Secondary PCIe Capability */ +#define PCI_EXT_CAP_ID_PMUX 0x1A /* Protocol Multiplexing */ +#define PCI_EXT_CAP_ID_PASID 0x1B /* Process Address Space ID */ + /* Include the ID list */ #include <pci_ids.h> @@ -687,6 +723,11 @@ extern int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev, extern int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap); +int pci_find_next_ext_capability(struct pci_controller *hose, + pci_dev_t dev, int start, int cap); +int pci_hose_find_ext_capability(struct pci_controller *hose, + pci_dev_t dev, int cap); + #ifdef CONFIG_PCI_FIXUP_DEV extern void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, unsigned short vendor, diff --git a/include/tsec.h b/include/tsec.h index 58cdc19..1119d2c 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -129,11 +129,7 @@ #define MINFLR_INIT_SETTINGS 0x00000040 -#ifdef CONFIG_LS102XA -#define DMACTRL_INIT_SETTINGS 0x00000003 -#else #define DMACTRL_INIT_SETTINGS 0x000000c3 -#endif #define DMACTRL_GRS 0x00000010 #define DMACTRL_GTS 0x00000008 #define DMACTRL_LE 0x00008000 |