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| author | Simon Glass <sjg@chromium.org> | 2015-07-06 12:54:26 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-21 17:39:31 -0600 |
| commit | dc6f4d3a55c7e26af6b0cd41bcd9486b16a1ab9e (patch) | |
| tree | f5e4e8a840d14db2c7bc71c84360242945ce24a0 | |
| parent | 6a1c7cef14a41ade84bccdded1fd87b908b6958c (diff) | |
| download | u-boot-imx-dc6f4d3a55c7e26af6b0cd41bcd9486b16a1ab9e.zip u-boot-imx-dc6f4d3a55c7e26af6b0cd41bcd9486b16a1ab9e.tar.gz u-boot-imx-dc6f4d3a55c7e26af6b0cd41bcd9486b16a1ab9e.tar.bz2 | |
sandbox: Support multiple reset types
Add settings for the last reset generated, and the types of resets which
are permitted. This will be used for testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/sandbox/cpu/state.c | 4 | ||||
| -rw-r--r-- | arch/sandbox/include/asm/state.h | 3 |
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index cae731c..7e5d03e 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -345,6 +345,10 @@ int state_init(void) state->ram_buf = os_malloc(state->ram_size); assert(state->ram_buf); + /* No reset yet, so mark it as such. Always allow power reset */ + state->last_reset = RESET_COUNT; + state->reset_allowed[RESET_POWER] = true; + /* * Example of how to use GPIOs: * diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index a57480a..2bd28f6 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -7,6 +7,7 @@ #define __SANDBOX_STATE_H #include <config.h> +#include <reset.h> #include <stdbool.h> #include <linux/stringify.h> @@ -59,6 +60,8 @@ struct sandbox_state { bool write_state; /* Write sandbox state on exit */ bool ignore_missing_state_on_read; /* No error if state missing */ bool show_lcd; /* Show LCD on start-up */ + enum reset_t last_reset; /* Last reset type */ + bool reset_allowed[RESET_COUNT]; /* Allowed reset types */ enum state_terminal_raw term_raw; /* Terminal raw/cooked */ /* Pointer to information for each SPI bus/cs */ |