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authorHeiko Schocher <hs@denx.de>2011-11-01 20:00:34 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-03 22:56:25 +0100
commit8bfe325c74cf5866fa17b9a45e44a869151b5e8a (patch)
tree92050673ec779c3bd14e9dc2ccd4530bd71908d4
parent29b0bef54cf611baa6e6704c4f4b0d47f5fafb96 (diff)
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arm926ejs, davinci: add missing spi defines for dm365
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
-rw-r--r--arch/arm/include/asm/arch-davinci/hardware.h2
-rw-r--r--arch/arm/include/asm/arch-davinci/pll_defs.h1
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index 77c4d62..707ff4d 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -111,6 +111,8 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x01d10000
#define DAVINCI_MMC_SD0_BASE 0x01d11000
#define DAVINCI_DDR_EMIF_CTRL_BASE 0x20000000
+#define DAVINCI_SPI0_BASE 0x01c66000
+#define DAVINCI_SPI1_BASE 0x01c66800
#elif defined(CONFIG_SOC_DM646X)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE 0x20008000
diff --git a/arch/arm/include/asm/arch-davinci/pll_defs.h b/arch/arm/include/asm/arch-davinci/pll_defs.h
index 606ed0b..5c30953 100644
--- a/arch/arm/include/asm/arch-davinci/pll_defs.h
+++ b/arch/arm/include/asm/arch-davinci/pll_defs.h
@@ -78,6 +78,7 @@ struct dv_pll_regs {
#define ARM_PLLDIV (offsetof(struct dv_pll_regs, plldiv2))
#define DDR_PLLDIV (offsetof(struct dv_pll_regs, plldiv7))
+#define SPI_PLLDIV (offsetof(struct dv_pll_regs, plldiv4))
unsigned int davinci_clk_get(unsigned int div);
#endif /* _DV_PLL_DEFS_H_ */