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authorSimon Glass <sjg@chromium.org>2016-01-18 20:19:19 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-01-24 12:07:17 +0800
commit81afac123896cdd560411f78f673d5bdccbcafbb (patch)
tree58237ef467d9a861b14861be25beab87d62009c5
parent1ff4f321b69950acca1b06daed89d872a52a337c (diff)
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dm: x86: Add a driver for Intel PCH9
At some point we may need to distinguish between different types of PCHs, but for existing supported platforms we only need to worry about version 7 and version 9 bridges. Add a driver for the PCH9. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r--drivers/pch/Makefile1
-rw-r--r--drivers/pch/pch9.c43
2 files changed, 44 insertions, 0 deletions
diff --git a/drivers/pch/Makefile b/drivers/pch/Makefile
index 33aa727..dde9e86 100644
--- a/drivers/pch/Makefile
+++ b/drivers/pch/Makefile
@@ -4,3 +4,4 @@
obj-y += pch-uclass.o
obj-y += pch7.o
+obj-y += pch9.o
diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c
new file mode 100644
index 0000000..529cb02
--- /dev/null
+++ b/drivers/pch/pch9.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pch.h>
+
+#define SBASE_ADDR 0x54
+
+static int pch9_get_sbase(struct udevice *dev, ulong *sbasep)
+{
+ uint32_t sbase_addr;
+
+ dm_pci_read_config32(dev, SBASE_ADDR, &sbase_addr);
+ *sbasep = sbase_addr & 0xfffffe00;
+
+ return 0;
+}
+
+static enum pch_version pch9_get_version(struct udevice *dev)
+{
+ return PCHV_9;
+}
+
+static const struct pch_ops pch9_ops = {
+ .get_sbase = pch9_get_sbase,
+ .get_version = pch9_get_version,
+};
+
+static const struct udevice_id pch9_ids[] = {
+ { .compatible = "intel,pch9" },
+ { }
+};
+
+U_BOOT_DRIVER(pch9_drv) = {
+ .name = "intel-pch9",
+ .id = UCLASS_PCH,
+ .of_match = pch9_ids,
+ .ops = &pch9_ops,
+};