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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-21 14:43:12 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-04-24 09:53:55 +0900 |
| commit | 7b3a032dd37e1cb541a7f5b3b53964481ab11201 (patch) | |
| tree | f2e683243b94dda180d90d22b614600e31225349 | |
| parent | 740314326dd49888647bf84ed44106faf2f161cd (diff) | |
| download | u-boot-imx-7b3a032dd37e1cb541a7f5b3b53964481ab11201.zip u-boot-imx-7b3a032dd37e1cb541a7f5b3b53964481ab11201.tar.gz u-boot-imx-7b3a032dd37e1cb541a7f5b3b53964481ab11201.tar.bz2 | |
ARM: uniphier: avoid unaligned access to DT on 64bit SoC
Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| -rw-r--r-- | arch/arm/mach-uniphier/dram_init.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 815f243..ef0e2e8 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -6,6 +6,7 @@ #include <common.h> #include <libfdt.h> +#include <fdtdec.h> #include <linux/err.h> DECLARE_GLOBAL_DATA_PTR; @@ -40,8 +41,7 @@ int dram_init(void) val += ac; - gd->ram_size = sc == 2 ? fdt64_to_cpu(*(fdt64_t *)val) : - fdt32_to_cpu(*val); + gd->ram_size = fdtdec_get_number(val, sc); debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size); @@ -71,11 +71,9 @@ void dram_init_banksize(void) for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells; i++, len -= cells) { - gd->bd->bi_dram[i].start = ac == 2 ? - fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val); + gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac); val += ac; - gd->bd->bi_dram[i].size = sc == 2 ? - fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val); + gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc); val += sc; debug("DRAM bank %d: start = %08lx, size = %08lx\n", |