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author | Stephen Warren <swarren@nvidia.com> | 2015-02-24 14:08:29 -0700 |
---|---|---|
committer | Tom Warren <twarren@nvidia.com> | 2015-03-04 10:09:01 -0700 |
commit | 790f7719e2635a3ff3f44473b060e01b5b5ebf74 (patch) | |
tree | a93d85ab77323e2d6536a324c3ee84c1ae2685ad | |
parent | f2c60eed513ecc142e0a39373d5c16a14f976d6d (diff) | |
download | u-boot-imx-790f7719e2635a3ff3f44473b060e01b5b5ebf74.zip u-boot-imx-790f7719e2635a3ff3f44473b060e01b5b5ebf74.tar.gz u-boot-imx-790f7719e2635a3ff3f44473b060e01b5b5ebf74.tar.bz2 |
ARM: tegra: pinmux: account for different drivegroup base registers
Tegra210 starts its drive group registers at a different offset from the
APB MISC register block that other SoCs. Update the code to handle this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r-- | arch/arm/include/asm/arch-tegra114/pinmux.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra124/pinmux.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/pinmux.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra30/pinmux.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-tegra/pinmux-common.c | 2 |
5 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 4848c95..38d8b9c 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -313,6 +313,7 @@ enum pmux_func { PMUX_FUNC_COUNT, }; +#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING #define TEGRA_PMX_SOC_HAS_DRVGRPS #define TEGRA_PMX_GRPS_HAVE_LPMD diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h index 4e6b88e..78bc9e6 100644 --- a/arch/arm/include/asm/arch-tegra124/pinmux.h +++ b/arch/arm/include/asm/arch-tegra124/pinmux.h @@ -335,6 +335,7 @@ enum pmux_func { PMUX_FUNC_COUNT, }; +#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #define TEGRA_PMX_SOC_HAS_IO_CLAMPING #define TEGRA_PMX_SOC_HAS_DRVGRPS #define TEGRA_PMX_GRPS_HAVE_LPMD diff --git a/arch/arm/include/asm/arch-tegra20/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h index f7bc97f..bf35d50 100644 --- a/arch/arm/include/asm/arch-tegra20/pinmux.h +++ b/arch/arm/include/asm/arch-tegra20/pinmux.h @@ -233,6 +233,7 @@ enum pmux_func { PMUX_FUNC_COUNT, }; +#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #include <asm/arch-tegra/pinmux.h> #endif /* _TEGRA20_PINMUX_H_ */ diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h index 56117a4..3358bf7 100644 --- a/arch/arm/include/asm/arch-tegra30/pinmux.h +++ b/arch/arm/include/asm/arch-tegra30/pinmux.h @@ -391,6 +391,7 @@ enum pmux_func { PMUX_FUNC_COUNT, }; +#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868 #define TEGRA_PMX_SOC_HAS_DRVGRPS #define TEGRA_PMX_GRPS_HAVE_LPMD #define TEGRA_PMX_GRPS_HAVE_SCHMT diff --git a/arch/arm/mach-tegra/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c index b4ed153..9bf3086 100644 --- a/arch/arm/mach-tegra/pinmux-common.c +++ b/arch/arm/mach-tegra/pinmux-common.c @@ -99,7 +99,7 @@ #endif /* CONFIG_TEGRA20 */ -#define DRV_REG(group) _R(0x868 + ((group) * 4)) +#define DRV_REG(group) _R(TEGRA_PMX_SOC_DRV_GROUP_BASE_REG + ((group) * 4)) /* * We could force arch-tegraNN/pinmux.h to define all of these. However, |