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authorYork Sun <york.sun@nxp.com>2016-11-18 11:32:46 -0800
committerYork Sun <york.sun@nxp.com>2016-11-23 23:42:11 -0800
commit3b83649d53896cf115788130799d9ff585867e4a (patch)
tree342099b0b555912698e3a175560f42a37349571c
parentcefe11cdb2a0d1fe0daf90408d3c49e627ef39a7 (diff)
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powerpc: P5020DS: Remove macro CONFIG_P5020DS
Use CONFIG_TARGET_P5020DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
-rw-r--r--board/freescale/common/Makefile4
-rw-r--r--board/freescale/corenet_ds/Makefile4
-rw-r--r--board/freescale/corenet_ds/corenet_ds.c6
-rw-r--r--include/configs/P5020DS.h2
-rw-r--r--include/configs/corenet_ds.h2
-rw-r--r--scripts/config_whitelist.txt1
6 files changed, 8 insertions, 11 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index c26ada1..73a722a 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -55,7 +55,7 @@ obj-$(CONFIG_TARGET_P1022DS) += ics307_clk.o
obj-$(CONFIG_P2020DS) += ics307_clk.o
obj-$(CONFIG_TARGET_P3041DS) += ics307_clk.o
obj-$(CONFIG_TARGET_P4080DS) += ics307_clk.o
-obj-$(CONFIG_P5020DS) += ics307_clk.o
+obj-$(CONFIG_TARGET_P5020DS) += ics307_clk.o
obj-$(CONFIG_P5040DS) += ics307_clk.o
obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o
obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
@@ -68,7 +68,7 @@ obj-$(CONFIG_LS102XA_STREAM_ID) += ls102xa_stream_id.o
obj-$(CONFIG_TARGET_P2041RDB) += p_corenet/
obj-$(CONFIG_TARGET_P3041DS) += p_corenet/
obj-$(CONFIG_TARGET_P4080DS) += p_corenet/
-obj-$(CONFIG_P5020DS) += p_corenet/
+obj-$(CONFIG_TARGET_P5020DS) += p_corenet/
obj-$(CONFIG_P5040DS) += p_corenet/
obj-$(CONFIG_LAYERSCAPE_NS_ACCESS) += ns_access.o
diff --git a/board/freescale/corenet_ds/Makefile b/board/freescale/corenet_ds/Makefile
index f5db922..6bd54c0 100644
--- a/board/freescale/corenet_ds/Makefile
+++ b/board/freescale/corenet_ds/Makefile
@@ -10,9 +10,9 @@ obj-y += corenet_ds.o
obj-y += ddr.o
obj-$(CONFIG_TARGET_P3041DS) += eth_hydra.o
obj-$(CONFIG_TARGET_P4080DS) += eth_p4080.o
-obj-$(CONFIG_P5020DS) += eth_hydra.o
+obj-$(CONFIG_TARGET_P5020DS) += eth_hydra.o
obj-$(CONFIG_P5040DS) += eth_superhydra.o
obj-$(CONFIG_TARGET_P3041DS) += p3041ds_ddr.o
obj-$(CONFIG_TARGET_P4080DS) += p4080ds_ddr.o
-obj-$(CONFIG_P5020DS) += p5020ds_ddr.o
+obj-$(CONFIG_TARGET_P5020DS) += p5020ds_ddr.o
obj-$(CONFIG_P5040DS) += p5040ds_ddr.o
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 632b37b..cc33d5c 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -26,7 +26,7 @@ int checkboard (void)
{
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
-#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_P5020DS) || \
+#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) || \
defined(CONFIG_P5040DS)
unsigned int i;
#endif
@@ -56,7 +56,7 @@ int checkboard (void)
* don't match.
*/
puts("SERDES Reference Clocks: ");
-#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_P5020DS) \
+#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) \
|| defined(CONFIG_P5040DS)
sw = in_8(&PIXIS_SW(5));
for (i = 0; i < 3; i++) {
@@ -136,7 +136,7 @@ int misc_init_r(void)
unsigned int i;
u8 sw;
-#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_P5020DS) \
+#if defined(CONFIG_TARGET_P3041DS) || defined(CONFIG_TARGET_P5020DS) \
|| defined(CONFIG_P5040DS)
sw = in_8(&PIXIS_SW(5));
for (i = 0; i < 3; i++) {
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h
index a942d0c..17e941e 100644
--- a/include/configs/P5020DS.h
+++ b/include/configs/P5020DS.h
@@ -8,8 +8,6 @@
* P5020 DS board configuration file
* Also supports P5010 DS
*/
-#define CONFIG_P5020DS
-
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
#define CONFIG_MMC
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index fbc2758..bd8e504 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -28,7 +28,7 @@
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p3041ds.cfg
#elif defined(CONFIG_TARGET_P4080DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p4080ds.cfg
-#elif defined(CONFIG_P5020DS)
+#elif defined(CONFIG_TARGET_P5020DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5020ds.cfg
#elif defined(CONFIG_P5040DS)
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8af8ffc..4e97976 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR
CONFIG_OS_ENV_ADDR
CONFIG_OTHBOOTARGS
CONFIG_OVERWRITE_ETHADDR_ONCE
-CONFIG_P5020DS
CONFIG_P5040DS
CONFIG_PAGE_CNT_MASK
CONFIG_PAGE_CNT_SHIFT