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| author | John Traill <john.traill@freescale.com> | 2006-09-29 08:23:12 +0100 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2006-09-29 09:13:39 -0500 |
| commit | f55df18187e7a45cb73fec4370d12135e6691ae1 (patch) | |
| tree | 871c55639d4843eaaa8930ff372faab0726d46bf | |
| parent | d14ba6a798beb753e7a864500414fcc2d198b8bc (diff) | |
| download | u-boot-imx-f55df18187e7a45cb73fec4370d12135e6691ae1.zip u-boot-imx-f55df18187e7a45cb73fec4370d12135e6691ae1.tar.gz u-boot-imx-f55df18187e7a45cb73fec4370d12135e6691ae1.tar.bz2 | |
Fix missing tCycle/modfreq calculation.
Signed-off-by: John Traill <john.traill@freescale.com>
| -rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 44b0d41..39da3cc 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -466,6 +466,8 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num, * are slower than the DDR module. */ busfreq = get_bus_freq(0) / 1000000; /* MHz */ + tCycle_ps = convert_bcd_tenths_to_cycle_time_ps(spd.clk_cycle3); + modfreq = 2 * 1000 * 1000 / tCycle_ps; if ((spd.mem_type == SPD_MEMTYPE_DDR2) && (busfreq < 266)) { printf("DDR: platform frequency too low for correct DDR2 controller operation\n"); |