nand_spl: remove simpc8313 support

Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.

Also update README.scrapyard.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

10 files changed, 11 insertions, 1131 deletions

diff --git a/board/sheldon/simpc8313/Makefile b/board/sheldon/simpc8313/Makefile
deleted file mode 100644
index a824c41..0000000
--- a/board/sheldon/simpc8313/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= simpc8313.o sdram.o
diff --git a/board/sheldon/simpc8313/README.simpc8313 b/board/sheldon/simpc8313/README.simpc8313
deleted file mode 100644
index b362c6a..0000000
--- a/board/sheldon/simpc8313/README.simpc8313
+++ /dev/null
@@ -1,80 +0,0 @@
-Sheldon Instruments SIMPC8313 Board
------------------------------------------
-
-1.	Board Switches and Jumpers
-
-	S2 is used to set CFG_RESET_SOURCE.
-
-	To boot the image in Large page NAND flash, use these DIP
-	switch settings for S2:
-
-	+----------+ ON
-	| * * **** |
-	|  * *     |
-	+----------+
-	  12345678
-
-	To boot the image in Small page NAND flash, use these DIP
-	switch settings for S2:
-
-	+----------+ ON
-	| *** **** |
-	|    *     |
-	+----------+
-	  12345678
-	(where the '*' indicates the position of the tab of the switch.)
-
-2.	Memory Map
-	The memory map looks like this:
-
-	0x0000_0000	0x1fff_ffff	DDR			512M
-	0x8000_0000	0x8fff_ffff	PCI MEM			256M
-	0x9000_0000	0x9fff_ffff	PCI_MMIO		256M
-	0xe000_0000	0xe00f_ffff	IMMR			1M
-	0xe200_0000	0xe20f_ffff	PCI IO			16M
-	0xe280_0000	0xe280_7fff	NAND FLASH (CS0)	32K
-	or
-	0xe280_0000	0xe281_ffff	NAND FLASH (CS0)	128K
-	0xff00_0000	0xff00_7fff	FPGA (CS1)		1M
-
-3.	Compilation
-
-	Assuming you're using BASH (or similar) as your shell:
-
-	export CROSS_COMPILE=your-cross-compiler-prefix-
-	make distclean
-	make SIMPC8313_LP_config
-	(or make SIMPC8313_SP_config, depending on the page size
-	of your NAND flash)
-	make
-
-4.	Downloading and Flashing Images
-
-4.1	Reflash U-boot Image using U-boot
-
-	=>run update_uboot
-
-	You may want to try
-	=>tftp $loadaddr $uboot
-	first, to make sure that the TFTP load will succeed before it
-	goes ahead and wipes out your current firmware.  And of course,
-	if the new u-boot doesn't boot, you can plug the board into
-	your PCI slot and with the supplied driver and sample app
-	you can reburn a working u-boot.
-
-4.2	Downloading and Booting Linux Kernel
-
-	Ensure that all networking-related environment variables are set
-	properly (including ipaddr, serverip, gatewayip (if needed),
-	netmask, ethaddr, eth1addr, fdtfile, and bootfile).
-
-	=>tftp $loadaddr uImage
-	=>nand write $loadaddr kernel $filesize
-	=>tftp $loadaddr $fdtfile
-	=>nand write $loadaddr 7e0000 1800
-
-	=>boot
-
-5	Notes
-
-	The console baudrate for SIMPC8313 is 115200bps.
diff --git a/board/sheldon/simpc8313/sdram.c b/board/sheldon/simpc8313/sdram.c
deleted file mode 100644
index 7c12fe8..0000000
--- a/board/sheldon/simpc8313/sdram.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
- * Copyright (C) Sheldon Instruments, Inc. 2008
- *
- * Author: Ron Madrid <info@sheldoninst.com>
- *
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc83xx.h>
-#include <spd_sdram.h>
-#include <asm/bitops.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static long fixed_sdram(void);
-
-#if defined(CONFIG_NAND_SPL)
-void si_wait_i2c(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-
-	while (!(__raw_readb(&im->i2c[0].sr) & 0x02))
-		;
-
-	__raw_writeb(0x00, &im->i2c[0].sr);
-
-	sync();
-
-	return;
-}
-
-void si_read_i2c(u32 lbyte, int count, u8 *buffer)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 i;
-	u8 chip = 0x50 << 1; /* boot sequencer I2C */
-	u32 ubyte = (lbyte & 0xff00) >> 8;
-
-	lbyte &= 0xff;
-
-	/*
-	 * Set up controller
-	 */
-	__raw_writeb(0x3f, &im->i2c[0].fdr);
-	__raw_writeb(0x00, &im->i2c[0].adr);
-	__raw_writeb(0x00, &im->i2c[0].sr);
-	__raw_writeb(0x00, &im->i2c[0].dr);
-
-	while (__raw_readb(&im->i2c[0].sr) & 0x20)
-		;
-
-	/*
-	 * Writing address to device
-	 */
-	__raw_writeb(0xb0, &im->i2c[0].cr);
-	sync();
-	__raw_writeb(chip, &im->i2c[0].dr);
-	si_wait_i2c();
-
-	__raw_writeb(0xb0, &im->i2c[0].cr);
-	sync();
-	__raw_writeb(ubyte, &im->i2c[0].dr);
-	si_wait_i2c();
-
-	__raw_writeb(lbyte, &im->i2c[0].dr);
-	si_wait_i2c();
-
-	__raw_writeb(0xb4, &im->i2c[0].cr);
-	sync();
-	__raw_writeb(chip + 1, &im->i2c[0].dr);
-	si_wait_i2c();
-
-	__raw_writeb(0xa0, &im->i2c[0].cr);
-	sync();
-
-	/*
-	 * Dummy read
-	 */
-	__raw_readb(&im->i2c[0].dr);
-
-	si_wait_i2c();
-
-	/*
-	 * Read actual data
-	 */
-	for (i = 0; i < count; i++)
-	{
-		if (i == (count - 2))	/* Reached next to last byte, No ACK */
-			__raw_writeb(0xa8, &im->i2c[0].cr);
-		if (i == (count - 1))	/* Reached last byte, STOP */
-			__raw_writeb(0x88, &im->i2c[0].cr);
-
-		/* Read byte of data */
-		buffer[i] = __raw_readb(&im->i2c[0].dr);
-
-		if (i == (count - 1))
-			break;
-		si_wait_i2c();
-	}
-
-	return;
-}
-#endif /* CONFIG_NAND_SPL */
-
-phys_size_t initdram(int board_type)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile fsl_lbc_t *lbc = &im->im_lbc;
-	u32 msize;
-
-	if ((__raw_readl(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32) im)
-		return -1;
-
-	/* DDR SDRAM - Main SODIMM */
-	__raw_writel(CONFIG_SYS_DDR_BASE & LAWBAR_BAR, &im->sysconf.ddrlaw[0].bar);
-
-	msize = fixed_sdram();
-
-	/* Local Bus setup lbcr and mrtpr */
-	__raw_writel(CONFIG_SYS_LBC_LBCR, &lbc->lbcr);
-	__raw_writel(CONFIG_SYS_LBC_MRTPR, &lbc->mrtpr);
-	sync();
-
-	/* return total bus SDRAM size(bytes)  -- DDR */
-	return (msize * 1024 * 1024);
-}
-
-/*************************************************************************
- *  fixed sdram init -- reads values from boot sequencer I2C
- ************************************************************************/
-static long fixed_sdram(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 msizelog2, msize = 1;
-#if defined(CONFIG_NAND_SPL)
-	u32 i;
-	const u8 bytecount = 135;
-	u8 buffer[bytecount];
-	u32 addr, data;
-
-	si_read_i2c(0, bytecount, buffer);
-
-	for (i = 18; i < bytecount; i += 7){
-		addr = (u32)buffer[i];
-		addr <<= 8;
-		addr |= (u32)buffer[i + 1];
-		addr <<= 2;
-		data = (u32)buffer[i + 2];
-		data <<= 8;
-		data |= (u32)buffer[i + 3];
-		data <<= 8;
-		data |= (u32)buffer[i + 4];
-		data <<= 8;
-		data |= (u32)buffer[i + 5];
-
-		__raw_writel(data, (u32 *)(CONFIG_SYS_IMMR + addr));
-	}
-
-	sync();
-
-	/* enable DDR controller */
-	__raw_writel((__raw_readl(&im->ddr.sdram_cfg) | SDRAM_CFG_MEM_EN), &im->ddr.sdram_cfg);
-#endif /* (CONFIG_NAND_SPL) */
-
-	msizelog2 = ((__raw_readl(&im->sysconf.ddrlaw[0].ar) & LAWAR_SIZE) + 1);
-	msize <<= (msizelog2 - 20);
-
-	return msize;
-}
diff --git a/board/sheldon/simpc8313/simpc8313.c b/board/sheldon/simpc8313/simpc8313.c
deleted file mode 100644
index 31406fa..0000000
--- a/board/sheldon/simpc8313/simpc8313.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
- * Copyright (C) Sheldon Instruments, Inc. 2008
- *
- * Author: Ron Madrid <info@sheldoninst.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <libfdt.h>
-#include <pci.h>
-#include <mpc83xx.h>
-#include <ns16550.h>
-#include <nand.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifndef CONFIG_NAND_SPL
-int checkboard(void)
-{
-	puts("Board: Sheldon Instruments SIMPC8313\n");
-	return 0;
-}
-
-static struct pci_region pci_regions[] = {
-	{
-		bus_start: CONFIG_SYS_PCI1_MEM_BASE,
-		phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
-		size: CONFIG_SYS_PCI1_MEM_SIZE,
-		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
-		phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
-		size: CONFIG_SYS_PCI1_MMIO_SIZE,
-		flags: PCI_REGION_MEM
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_IO_BASE,
-		phys_start: CONFIG_SYS_PCI1_IO_PHYS,
-		size: CONFIG_SYS_PCI1_IO_SIZE,
-		flags: PCI_REGION_IO
-	}
-};
-
-void pci_init_board(void)
-{
-	volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
-	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
-	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
-	struct pci_region *reg[] = { pci_regions };
-
-	/* Enable all 3 PCI_CLK_OUTPUTs. */
-	clk->occr |= 0xe0000000;
-
-	/*
-	 * Configure PCI Local Access Windows
-	 */
-	pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
-	pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
-
-	pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
-	pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
-
-	mpc83xx_pci_init(1, reg);
-}
-
-/*
- * Miscellaneous late-boot configurations
- */
-int misc_init_r(void)
-{
-	int rc = 0;
-	immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	fsl_lbc_t *lbus = &immap->im_lbc;
-	u32 *mxmr = &lbus->mamr;	/* Pointer to mamr */
-
-	/* UPM Table Configuration Code */
-	static uint UPMATable[] = {
-		/* Read Single-Beat (RSS) */
-		0x0fff0c00, 0x0fffdc00, 0x0fff0c05, 0xfffffc00,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
-		/* Read Burst (RBS) */
-		0x0fff0c00, 0x0ffcdc00, 0x0ffc0c00, 0x0ffc0f0c,
-		0x0ffccf0c, 0x0ffc0f0c, 0x0ffcce0c, 0x3ffc0c05,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
-		/* Write Single-Beat (WSS) */
-		0x0ffc0c00, 0x0ffcdc00, 0x0ffc0c05, 0xfffffc00,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
-		/* Write Burst (WBS) */
-		0x0ffc0c00, 0x0fffcc0c, 0x0fff0c00, 0x0fffcc00,
-		0x0fff1c00, 0x0fffcf0c, 0x0fff0f0c, 0x0fffcf0c,
-		0x0fff0c0c, 0x0fffcc0c, 0x0fff0c05, 0xfffffc00,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
-		/* Refresh Timer (RTS) */
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
-		/* Exception Condition (EXS) */
-		0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01
-	};
-
-	upmconfig(UPMA, UPMATable, sizeof(UPMATable) / sizeof(UPMATable[0]));
-
-	/* Set LUPWAIT to be active low and enabled */
-	out_be32(mxmr, MxMR_UWPL | MxMR_GPL_x4DIS);
-
-	return rc;
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI
-	ft_pci_setup(blob, bd);
-#endif
-}
-#endif
-#else /* CONFIG_NAND_SPL */
-void board_init_f(ulong bootflag)
-{
-	NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
-				CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
-	puts("NAND boot... ");
-	init_timebase();
-	initdram(0);
-	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd,
-				  CONFIG_SYS_NAND_U_BOOT_RELOC);
-}
-
-void board_init_r(gd_t *gd, ulong dest_addr)
-{
-	nand_boot();
-}
-
-void putc(char c)
-{
-	if (gd->flags & GD_FLG_SILENT)
-		return;
-
-	if (c == '\n')
-		NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r');
-
-	NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c);
-}
-#endif
diff --git a/boards.cfg b/boards.cfg
index d8646c6..a58efd6 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -717,8 +717,6 @@ Active  powerpc     mpc83xx        -           keymile         km83xx
 Active  powerpc     mpc83xx        -           keymile         km83xx              suvd3                                 suvd3:SUVD3                                                                                                                       Holger Brunck <holger.brunck@keymile.com>
 Active  powerpc     mpc83xx        -           keymile         km83xx              tuge1                                 tuxx1:TUGE1                                                                                                                       Holger Brunck <holger.brunck@keymile.com>
 Active  powerpc     mpc83xx        -           keymile         km83xx              tuxx1                                 tuxx1:TUXX1                                                                                                                       Holger Brunck <holger.brunck@keymile.com>
-Active  powerpc     mpc83xx        -           sheldon         simpc8313           SIMPC8313_LP                          SIMPC8313:NAND_LP                                                                                                                 Ron Madrid <info@sheldoninst.com>
-Active  powerpc     mpc83xx        -           sheldon         simpc8313           SIMPC8313_SP                          SIMPC8313:NAND_SP                                                                                                                 Ron Madrid <info@sheldoninst.com>
 Active  powerpc     mpc83xx        -           tqc             tqm834x             TQM834x                               -                                                                                                                                 -
 Active  powerpc     mpc85xx        -           -               sbc8548             sbc8548                               -                                                                                                                                 Paul Gortmaker <paul.gortmaker@windriver.com>
 Active  powerpc     mpc85xx        -           -               sbc8548             sbc8548_PCI_33                        sbc8548:PCI,33                                                                                                                    Paul Gortmaker <paul.gortmaker@windriver.com>
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index e2157e0..6c6be68 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,16 +11,17 @@ easily if here is something they might want to dig for...
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
-hidden_dragon    powerpc     mpc824x        -           -           Yusdi Santoso <yusdi_santoso@adaptec.com>
-debris           powerpc     mpc824x        -           -           Sangmoon Kim <dogoil@etinsys.com>
-kvme080          powerpc     mpc824x        -           -           Sangmoon Kim <dogoil@etinsys.com>
-ep8248           powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
-ispan            powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
-rattler          powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
-zpc1900          powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
-mpc8260ads       powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
-adder            powerpc     mpc8xx         -           -           Yuli Barcohen <yuli@arabellasw.com>
-quad100hd	 powerpc     ppc405ep	    -		-	    Gary Jennejohn <gljennjohn@googlemail.com>
+simpc8313        powerpc     mpc83xx        -           2014-04-28  Ron Madrid <info@sheldoninst.com>
+hidden_dragon    powerpc     mpc824x        3fe1a854    2014-05-30  Yusdi Santoso <yusdi_santoso@adaptec.com>
+debris           powerpc     mpc824x        7edb1f7b    2014-05-30  Sangmoon Kim <dogoil@etinsys.com>
+kvme080          powerpc     mpc824x        2868f862    2014-05-30  Sangmoon Kim <dogoil@etinsys.com>
+ep8248           powerpc     mpc8260        49ad566d    2014-05-30  Yuli Barcohen <yuli@arabellasw.com>
+ispan            powerpc     mpc8260        80bae39a    2014-05-30  Yuli Barcohen <yuli@arabellasw.com>
+rattler          powerpc     mpc8260        d0664db4    2014-05-30  Yuli Barcohen <yuli@arabellasw.com>
+zpc1900          powerpc     mpc8260        6f80bb48    2014-05-30  Yuli Barcohen <yuli@arabellasw.com>
+mpc8260ads       powerpc     mpc8260        facb6725    2014-05-30  Yuli Barcohen <yuli@arabellasw.com>
+adder            powerpc     mpc8xx         373a9788    2014-05-30  Yuli Barcohen <yuli@arabellasw.com>
+quad100hd        powerpc     ppc405ep       3569571d    2014-05-30  Gary Jennejohn <gljennjohn@googlemail.com>
 lubbock          arm         pxa            36bf57b     2014-04-18  Kyle Harris <kharris@nexus-tech.net>
 EVB64260	 powerpc     mpc824x        bb3aef9	2014-04-18
 MOUSSE           powerpc     mpc824x        03f2ecc     2014-04-18
diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h
deleted file mode 100644
index 46157cc..0000000
--- a/include/configs/SIMPC8313.h
+++ /dev/null
@@ -1,580 +0,0 @@
-/*
- * Copyright (C) Sheldon Instruments, Inc. 2008
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-/*
- * simpc8313 board configuration file
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_NAND_U_BOOT
-
-#define CONFIG_E300			1
-#define CONFIG_MPC831x			1
-#define CONFIG_MPC8313			1
-
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(512 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST	0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_START	0x00100100
-#define CONFIG_SYS_NAND_U_BOOT_RELOC	0x00010000
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
-
-#define CONFIG_SYS_TEXT_BASE	0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
-#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
-
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
-#else
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
-#endif
-
-#define CONFIG_PCI
-#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_FSL_ELBC			1
-
-#define CONFIG_MISC_INIT_R
-
-/*
- * On-board devices
- *
- * TSEC1 is Marvell PHY 88E1118
- */
-
-#define CONFIG_SYS_33MHZ
-
-#define CONFIG_83XX_CLKIN		33333333	/* in Hz */
-
-#define CONFIG_SYS_CLK_FREQ		CONFIG_83XX_CLKIN
-
-#define CONFIG_SYS_IMMR			0xE0000000
-
-#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
-#define CONFIG_DEFAULT_IMMR		CONFIG_SYS_IMMR
-#endif
-
-#define CONFIG_SYS_MEMTEST_START	0x00001000
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
-
-#define CONFIG_SYS_ACR_PIPE_DEP	3	/* Arbiter pipeline depth (0-3) */
-#define CONFIG_SYS_ACR_RPTCNT	3	/* Arbiter repeat count (0-7) */
-
-/*
- * Device configurations
- */
-#define CONFIG_TSEC1
-
-/*
- * DDR Setup
- */
-					/* DDR is system memory*/
-#define CONFIG_SYS_DDR_BASE		0x00000000
-#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE	CONFIG_SYS_DDR_BASE
-
-#define CONFIG_VERY_BIG_RAM
-#define CONFIG_MAX_MEM_MAPPED		(512 << 20)
-
-#define CONFIG_SYS_DDRCDR		(DDRCDR_EN \
-					| DDRCDR_PZ_NOMZ \
-					| DDRCDR_NZ_NOMZ \
-					| DDRCDR_M_ODR)
-					/* 0x73000002 TODO ODR & DRN ? */
-
-/*
- * FLASH on the Local Bus
- */
-#define CONFIG_SYS_NO_FLASH
-
-#if !defined(CONFIG_NAND_SPL)
-#define CONFIG_SYS_RAMBOOT
-#endif
-
-#define CONFIG_SYS_INIT_RAM_LOCK	1
-#define CONFIG_SYS_INIT_RAM_ADDR	0xFD000000 /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_SIZE	0x1000 /* Size of used area in RAM*/
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	\
-			(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
-#define CONFIG_SYS_MONITOR_LEN	(256 * 1024)	/* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN	(512 * 1024)	/* Reserved for malloc */
-
-/*
- * Local Bus LCRR and LBCR regs
- */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_EADC	LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_2
-#define CONFIG_SYS_LBC_LBCR	(0x00040000 /* TODO */ \
-				| (0xFF << LBCR_BMT_SHIFT) \
-				| 0xF)	/* 0x0004ff0f */
-
-				/* LB refresh timer prescal, 266MHz/32 */
-#define CONFIG_SYS_LBC_MRTPR	0x20000000
-
-/* drivers/mtd/nand/nand.c */
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_SYS_NAND_BASE		0xFFF00000
-#else
-#define CONFIG_SYS_NAND_BASE		0xE2800000
-#endif
-#define CONFIG_SYS_FPGA_BASE		0xFF000000
-
-#define CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_NAND_FSL_ELBC		1
-
-#define CONFIG_SYS_NAND_BR_PRELIM	(CONFIG_SYS_NAND_BASE \
-				| BR_DECC_CHK_GEN	/* Use HW ECC */ \
-				| BR_PS_8		/* 8 bit Port */ \
-				| BR_MS_FCM		/* MSEL = FCM */ \
-				| BR_V)			/* valid */
-
-#ifdef CONFIG_NAND_SP
-#define CONFIG_SYS_NAND_OR_PRELIM	(OR_AM_32KB \
-					| OR_FCM_CSCT \
-					| OR_FCM_CST \
-					| OR_FCM_CHT \
-					| OR_FCM_SCY_1 \
-					| OR_FCM_TRLX \
-					| OR_FCM_EHTR)
-#define CONFIG_SYS_LBLAWAR0_PRELIM	(LBLAWAR_EN | LBLAWAR_32KB)
-#define CONFIG_SYS_NAND_PAGE_SIZE	512	/* NAND chip page size */
-					/* NAND chip block size */
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(16 << 10)
-#define NAND_CACHE_PAGES		32
-#elif defined(CONFIG_NAND_LP)
-#define CONFIG_SYS_NAND_OR_PRELIM	(OR_AM_256KB \
-					| OR_FCM_PGS \
-					| OR_FCM_CSCT \
-					| OR_FCM_CST \
-					| OR_FCM_CHT \
-					| OR_FCM_SCY_1 \
-					| OR_FCM_TRLX \
-					| OR_FCM_EHTR)
-#define CONFIG_SYS_LBLAWAR0_PRELIM	(LBLAWAR_EN | LBLAWAR_256KB)
-#define CONFIG_SYS_NAND_PAGE_SIZE	2048	/* NAND chip page size */
-					/* NAND chip block size */
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 << 10)
-#define NAND_CACHE_PAGES		64
-#else
-#error Page size of NAND not defined.
-#endif /* CONFIG_NAND_SP */
-
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SYS_NAND_BLOCK_SIZE
-
-#define CONFIG_SYS_BR0_PRELIM		CONFIG_SYS_NAND_BR_PRELIM
-#define CONFIG_SYS_OR0_PRELIM		CONFIG_SYS_NAND_OR_PRELIM
-
-#define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_NAND_BASE
-
-#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM	CONFIG_SYS_LBLAWBAR0_PRELIM
-#define CONFIG_SYS_NAND_LBLAWAR_PRELIM	CONFIG_SYS_LBLAWAR0_PRELIM
-
-#define CONFIG_SYS_BR1_PRELIM		(CONFIG_SYS_FPGA_BASE \
-					| BR_PS_16 \
-					| BR_MS_UPMA \
-					| BR_V)
-#define CONFIG_SYS_OR1_PRELIM		(OR_AM_2MB \
-					| OR_UPM_BCTLD)
-
-#define CONFIG_SYS_LBLAWBAR1_PRELIM	CONFIG_SYS_FPGA_BASE
-#define CONFIG_SYS_LBLAWAR1_PRELIM	(LBLAWAR_EN | LBLAWAR_2MB)
-
-/*
- * JFFS2 configuration
- */
-#define CONFIG_JFFS2_NAND
-#define CONFIG_JFFS2_DEV	"nand0"
-
-/* mtdparts command line support */
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
-#define MTDIDS_DEFAULT		"nand0=nand0"
-#define MTDPARTS_DEFAULT	"mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)"
-
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT		1
-#define CONFIG_OF_BOARD_SETUP		1
-#define CONFIG_OF_STDOUT_VIA_ALIAS	1
-
-/*
- * Serial Port
- */
-#define CONFIG_CONS_INDEX		1
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	1
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_NS16550_MIN_FUNCTIONS
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE	\
-		{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
-
-#define CONFIG_SYS_NS16550_COM1		(CONFIG_SYS_IMMR+0x4500)
-#define CONFIG_SYS_NS16550_COM2		(CONFIG_SYS_IMMR+0x4600)
-
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED	400000
-#define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET	0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED	400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET	0x3100
-#define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x69} }
-
-/*
- * General PCI
- * Addresses are mapped 1-1.
- */
-#define CONFIG_SYS_PCI1_MEM_BASE	0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS	CONFIG_SYS_PCI1_MEM_BASE
-#define CONFIG_SYS_PCI1_MEM_SIZE	0x10000000	/* 256M */
-#define CONFIG_SYS_PCI1_MMIO_BASE	0x90000000
-#define CONFIG_SYS_PCI1_MMIO_PHYS	CONFIG_SYS_PCI1_MMIO_BASE
-#define CONFIG_SYS_PCI1_MMIO_SIZE	0x10000000	/* 256M */
-#define CONFIG_SYS_PCI1_IO_BASE		0x00000000
-#define CONFIG_SYS_PCI1_IO_PHYS		0xE2000000
-#define CONFIG_SYS_PCI1_IO_SIZE		0x00100000	/* 1M */
-
-#define CONFIG_PCI_PNP			/* do pci plug-and-play */
-#define CONFIG_SYS_PCI_SUBSYS_VENDORID	0x1057	/* Motorola */
-
-/*
- * TSEC
- */
-#define CONFIG_TSEC_ENET		/* TSEC ethernet support */
-
-#define CONFIG_GMII			/* MII PHY management */
-
-#ifdef CONFIG_TSEC1
-#define CONFIG_HAS_ETH0
-#define CONFIG_TSEC1_NAME		"TSEC0"
-#define CONFIG_SYS_TSEC1_OFFSET		0x24000
-#define TSEC1_PHY_ADDR			0x0
-#define TSEC1_FLAGS			TSEC_GIGABIT
-#define TSEC1_PHYIDX			0
-#endif
-
-#ifdef CONFIG_TSEC2
-#define CONFIG_HAS_ETH1
-#define CONFIG_TSEC2_NAME		"TSEC1"
-#define CONFIG_SYS_TSEC2_OFFSET		0x25000
-#define TSEC2_PHY_ADDR			4
-#define TSEC2_FLAGS			TSEC_GIGABIT
-#define TSEC2_PHYIDX			0
-#endif
-
-
-/* Options are: TSEC[0-1] */
-#define CONFIG_ETHPRIME			"TSEC1"
-
-/*
- * Configure on-board RTC
- */
-#define CONFIG_RTC_DS1337
-#define CONFIG_SYS_I2C_RTC_ADDR		0x68
-
-/*
- * Environment
- */
-#if defined(CONFIG_NAND_U_BOOT)
-	#define CONFIG_ENV_IS_IN_NAND	1
-	#define CONFIG_ENV_OFFSET	(768 * 1024)
-	#define CONFIG_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
-	#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
-	#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
-	#define CONFIG_ENV_RANGE	(CONFIG_ENV_SECT_SIZE * 4)
-	#define CONFIG_ENV_OFFSET_REDUND	\
-					(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
-#elif !defined(CONFIG_SYS_RAMBOOT)
-	#define CONFIG_ENV_IS_IN_FLASH	1
-	#define CONFIG_ENV_ADDR		\
-			(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-	#define CONFIG_ENV_SECT_SIZE	0x10000	/* 64K(one sector) for env */
-	#define CONFIG_ENV_SIZE		0x2000
-
-/* Address and size of Redundant Environment Sector */
-#else
-	#define CONFIG_ENV_IS_NOWHERE	1	/* Store ENV in memory only */
-	#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - 0x1000)
-	#define CONFIG_ENV_SIZE		0x2000
-#endif
-
-#define CONFIG_LOADS_ECHO		1 /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE	1 /* allow baudrate change */
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_FLASH
-
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_JFFS2
-
-#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT)
-	#undef CONFIG_CMD_SAVEENV
-	#undef CONFIG_CMD_LOADS
-#endif
-
-#define CONFIG_CMDLINE_EDITING	1
-#define CONFIG_AUTO_COMPLETE	/* add autocompletion support   */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory */
-#define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size */
-
-#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE		\
-				+ sizeof(CONFIG_SYS_PROMPT)	\
-				+ 16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
-				/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 256 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-				/* Initial Memory map for Linux*/
-#define CONFIG_SYS_BOOTMAPSZ	(256 << 20)
-
-#define CONFIG_SYS_RCWH_PCIHOST	0x80000000	/* PCIHOST */
-
-#define CONFIG_SYS_HRCW_LOW	(HRCWL_LCL_BUS_TO_SCB_CLK_1X1	\
-				| 0x20000000 /* reserved */	\
-				| HRCWL_DDR_TO_SCB_CLK_2X1	\
-				| HRCWL_CSB_TO_CLKIN_4X1	\
-				| HRCWL_CORE_TO_CSB_2_5X1)
-
-#define CONFIG_SYS_NS16550_CLK	(CONFIG_83XX_CLKIN * 4)
-
-#define CONFIG_SYS_HRCW_HIGH_BASE	(HRCWH_PCI_HOST	\
-				| HRCWH_PCI1_ARBITER_ENABLE	\
-				| HRCWH_CORE_ENABLE		\
-				| HRCWH_BOOTSEQ_DISABLE		\
-				| HRCWH_SW_WATCHDOG_DISABLE	\
-				| HRCWH_TSEC1M_IN_RGMII		\
-				| HRCWH_TSEC2M_IN_RGMII		\
-				| HRCWH_BIG_ENDIAN		\
-				| HRCWH_LALE_NORMAL)
-
-#ifdef CONFIG_NAND_LP
-#define CONFIG_SYS_HRCW_HIGH	(CONFIG_SYS_HRCW_HIGH_BASE	\
-				| HRCWH_FROM_0XFFF00100		\
-				| HRCWH_ROM_LOC_NAND_LP_8BIT	\
-				| HRCWH_RL_EXT_NAND)
-#else
-#define CONFIG_SYS_HRCW_HIGH	(CONFIG_SYS_HRCW_HIGH_BASE	\
-				| HRCWH_FROM_0XFFF00100		\
-				| HRCWH_ROM_LOC_NAND_SP_8BIT	\
-				| HRCWH_RL_EXT_NAND)
-#endif
-
-/* System IO Config */
-#define CONFIG_SYS_SICRH	(SICRH_ETSEC2_B	\
-				| SICRH_ETSEC2_C	\
-				| SICRH_ETSEC2_D	\
-				| SICRH_ETSEC2_E	\
-				| SICRH_ETSEC2_F	\
-				| SICRH_ETSEC2_G	\
-				| SICRH_TSOBI1		\
-				| SICRH_TSOBI2)
-#define CONFIG_SYS_SICRL	(SICRL_LBC		\
-				| SICRL_USBDR_10	\
-				| SICRL_ETSEC2_A)
-
-#define CONFIG_SYS_HID0_INIT	0x000000000
-#define CONFIG_SYS_HID0_FINAL	(HID0_ENABLE_MACHINE_CHECK \
-				| HID0_ENABLE_INSTRUCTION_CACHE \
-				| HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
-
-#define CONFIG_SYS_HID2		HID2_HBE
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT0U	(CONFIG_SYS_SDRAM_BASE \
-				| BATU_BL_256M \
-				| BATU_VS \
-				| BATU_VP)
-#define CONFIG_SYS_IBAT1L	((CONFIG_SYS_SDRAM_BASE + 0x10000000) \
-				| BATL_PP_RW)
-#define CONFIG_SYS_IBAT1U	((CONFIG_SYS_SDRAM_BASE + 0x10000000) \
-				| BATU_BL_256M \
-				| BATU_VS \
-				| BATU_VP)
-
-/* PCI @ 0x80000000 */
-#define CONFIG_SYS_IBAT2L	(CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT2U	(CONFIG_SYS_PCI1_MEM_BASE \
-				| BATU_BL_256M \
-				| BATU_VS \
-				| BATU_VP)
-#define CONFIG_SYS_IBAT3L	(CONFIG_SYS_PCI1_MMIO_BASE \
-				| BATL_PP_RW \
-				| BATL_CACHEINHIBIT \
-				| BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT3U	(CONFIG_SYS_PCI1_MMIO_BASE \
-				| BATU_BL_256M \
-				| BATU_VS \
-				| BATU_VP)
-
-/* PCI2 not supported on 8313 */
-#define CONFIG_SYS_IBAT4L	(0)
-#define CONFIG_SYS_IBAT4U	(0)
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
-#define CONFIG_SYS_IBAT5L	(CONFIG_SYS_IMMR \
-				| BATL_PP_RW \
-				| BATL_CACHEINHIBIT \
-				| BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U	(CONFIG_SYS_IMMR \
-				| BATU_BL_256M \
-				| BATU_VS \
-				| BATU_VP)
-
-/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L	(0xF0000000 \
-				| BATL_PP_RW \
-				| BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U	(0xF0000000 \
-				| BATU_BL_256M \
-				| BATU_VS \
-				| BATU_VP)
-
-#define CONFIG_SYS_IBAT7L	(0)
-#define CONFIG_SYS_IBAT7U	(0)
-
-#define CONFIG_SYS_DBAT0L	CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U	CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L	CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U	CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L	CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U	CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L	CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U	CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L	CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U	CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L	CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U	CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L	CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U	CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L	CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U	CONFIG_SYS_IBAT7U
-
-/*
- * Environment Configuration
- */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_NETDEV		"eth1"
-
-#define CONFIG_HOSTNAME		simpc8313
-#define CONFIG_ROOTPATH		"/tftpboot/"
-#define CONFIG_BOOTFILE		"/tftpboot/uImage"
-				/* U-Boot image on TFTP server */
-#define CONFIG_UBOOTPATH	"u-boot-nand.bin"
-#define CONFIG_FDTFILE		"simpc8313.dtb"
-
-				/* default location for tftp and bootm */
-#define CONFIG_LOADADDR		500000
-#define CONFIG_BOOTDELAY	5	/* 5 second delay */
-#define CONFIG_BAUDRATE		115200
-
-#define CONFIG_BOOTCOMMAND	"nand read $loadaddr kernel 600000;" \
-					"bootm $loadaddr - $fdtaddr"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"netdev=" CONFIG_NETDEV "\0"					\
-	"ethprime=TSEC1\0"						\
-	"uboot=" CONFIG_UBOOTPATH "\0"					\
-	"tftpflash=tftpboot $loadaddr $uboot; "				\
-		"protect off " __stringify(CONFIG_SYS_TEXT_BASE)	\
-			" +$filesize; "	\
-		"erase " __stringify(CONFIG_SYS_TEXT_BASE)		\
-			" +$filesize; "	\
-		"cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)	\
-			" $filesize; "	\
-		"protect on " __stringify(CONFIG_SYS_TEXT_BASE)		\
-			" +$filesize; "	\
-		"cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)	\
-			" $filesize\0"	\
-	"fdtaddr=ae0000\0"						\
-	"fdtfile=" CONFIG_FDTFILE "\0"					\
-	"console=ttyS0\0"						\
-	"setbootargs=setenv bootargs "					\
-		"root=$rootdev rw console=$console,$baudrate $othbootargs\0" \
-	"setipargs=setenv bootargs nfsroot=$serverip:$rootpath "	\
-		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:"	\
-							"$netdev:off "	\
-		"root=$rootdev rw console=$console,$baudrate $othbootargs\0" \
-	"load_uboot=tftp 100000 u-boot-nand.bin\0"			\
-	"burn_uboot=nand erase u-boot 80000; "				\
-		"nand write 100000 u-boot $filesize\0"			\
-	"update_uboot=run load_uboot;run burn_uboot\0"			\
-	"mtdids=nand0=nand0\0"						\
-	"mtdparts=mtdparts=nand0:2M(u-boot),6M(kernel),-(jffs2)\0"	\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
-	"bootargs=root=/dev/mtdblock2 rootfstype=jffs2 rw "		\
-		"console=ttyS0,115200\0"				\
-	""
-
-#define CONFIG_NFSBOOTCOMMAND						\
-	"setenv rootdev /dev/nfs;"					\
-	"run setbootargs;"						\
-	"run setipargs;"						\
-	"tftp $loadaddr $bootfile;"					\
-	"tftp $fdtaddr $fdtfile;"					\
-	"bootm $loadaddr - $fdtaddr"
-
-#define CONFIG_RAMBOOTCOMMAND						\
-	"setenv rootdev /dev/ram;"					\
-	"run setbootargs;"						\
-	"tftp $ramdiskaddr $ramdiskfile;"				\
-	"tftp $loadaddr $bootfile;"					\
-	"tftp $fdtaddr $fdtfile;"					\
-	"bootm $loadaddr $ramdiskaddr $fdtaddr"
-
-#endif	/* __CONFIG_H */
diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile
deleted file mode 100644
index 657f65f..0000000
--- a/nand_spl/board/sheldon/simpc8313/Makefile
+++ /dev/null
@@ -1,81 +0,0 @@
-#
-# (C) Copyright 2007
-# Stefan Roese, DENX Software Engineering, sr@denx.de.
-# (C) Copyright 2008 Freescale Semiconductor
-# (C) Copyright Sheldon Instruments, Inc. 2008
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-include $(srctree)/$(src)/config.mk
-
-nandobj	:= $(objtree)/nand_spl/
-
-LDSCRIPT= $(srctree)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
-	   $(LDFLAGS) $(LDFLAGS_FINAL)
-asflags-y += -DCONFIG_NAND_SPL
-ccflags-y += -DCONFIG_NAND_SPL
-
-SOBJS	= start.o ticks.o
-COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \
-	  time.o cache.o
-
-OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-targets += $(__OBJS)
-
-all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-$(nandobj)u-boot-spl-16k.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-		-Map $(nandobj)u-boot-spl.map -o $@
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
-
-# create symbolic links for common files
-
-$(obj)/start.S:
-	@rm -f $@
-	ln -s $(srctree)/arch/powerpc/cpu/mpc83xx/start.S $@
-
-$(obj)/nand_boot_fsl_elbc.c:
-	@rm -f $@
-	ln -s $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
-
-$(obj)/sdram.c:
-	@rm -f $@
-	ln -s $(srctree)/board/$(BOARDDIR)/sdram.c $@
-
-$(obj)/$(BOARD).c:
-	@rm -f $@
-	ln -s $(srctree)/board/$(BOARDDIR)/$(BOARD).c $@
-
-$(obj)/ns16550.c:
-	@rm -f $@
-	ln -s $(srctree)/drivers/serial/ns16550.c $@
-
-$(obj)/spl_minimal.c:
-	@rm -f $@
-	ln -s $(srctree)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $@
-
-$(obj)/cache.c:
-	@rm -f $@
-	ln -s $(srctree)/arch/powerpc/lib/cache.c $@
-
-$(obj)/time.c:
-	@rm -f $@
-	ln -s $(srctree)/arch/powerpc/lib/time.c $@
-
-$(obj)/ticks.S:
-	@rm -f $@
-	ln -s $(srctree)/arch/powerpc/lib/ticks.S $@
diff --git a/nand_spl/board/sheldon/simpc8313/config.mk b/nand_spl/board/sheldon/simpc8313/config.mk
deleted file mode 100644
index d1b4e2e..0000000
--- a/nand_spl/board/sheldon/simpc8313/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-ifdef CONFIG_NAND_LP
-PAD_TO = 0xFFF20000
-else
-PAD_TO = 0xFFF04000
-endif
diff --git a/nand_spl/board/sheldon/simpc8313/u-boot.lds b/nand_spl/board/sheldon/simpc8313/u-boot.lds
deleted file mode 100644
index 4e4d511..0000000
--- a/nand_spl/board/sheldon/simpc8313/u-boot.lds
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright 2008 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
-	. = 0xfff00000;
-	.text : {
-		*(.text*)
-		. = ALIGN(16);
-		*(.eh_frame)
-		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-	}
-
-	. = ALIGN(8);
-	.data : {
-		*(.data*)
-		*(.sdata*)
-		_GOT2_TABLE_ = .;
-		*(.got2)
-		KEEP(*(.got))
-		PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-	}
-	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-
-	. = ALIGN(8);
-	__bss_start = .;
-	.bss (NOLOAD) : { *(.*bss) }
-	__bss_end = .;
-}
-ENTRY(_start)
-ASSERT(__bss_end <= 0xfff01000, "NAND bootstrap too big");