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| author | Simon Glass <sjg@chromium.org> | 2014-10-10 07:30:13 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-10-22 21:50:32 -0600 |
| commit | 6ddc4fd82283056a65d61ef38398ffbd06fd3c7b (patch) | |
| tree | bae66741c5971caed4be6a5052de32aa1b43baec | |
| parent | 2d41046531fb2421f2dd3f43a16f3d2f6484dad2 (diff) | |
| download | u-boot-imx-6ddc4fd82283056a65d61ef38398ffbd06fd3c7b.zip u-boot-imx-6ddc4fd82283056a65d61ef38398ffbd06fd3c7b.tar.gz u-boot-imx-6ddc4fd82283056a65d61ef38398ffbd06fd3c7b.tar.bz2 | |
x86: Add device tree information for Chrome OS EC
Add the required node describing how to find the EC on link.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/x86/dts/link.dts | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 4a37dac..67ce52a 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -32,4 +32,22 @@ memory-map = <0xff800000 0x00800000>; }; }; + + lpc { + compatible = "intel,lpc"; + #address-cells = <1>; + #size-cells = <1>; + cros-ec@200 { + compatible = "google,cros-ec"; + reg = <0x204 1 0x200 1 0x880 0x80>; + + /* This describes the flash memory within the EC */ + #address-cells = <1>; + #size-cells = <1>; + flash@8000000 { + reg = <0x08000000 0x20000>; + erase-value = <0xff>; + }; + }; + }; }; |