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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-06-04 10:26:53 +0900 |
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committer | Tom Rini <trini@ti.com> | 2014-06-05 17:01:59 -0400 |
commit | 66948c25bb7d90d561c1b8be3d69696ef649358f (patch) | |
tree | 0d122684567ed18481c50408c2529e9b5d52b294 | |
parent | 7445207f0fa495108736a5642b5b98aef3aed757 (diff) | |
download | u-boot-imx-66948c25bb7d90d561c1b8be3d69696ef649358f.zip u-boot-imx-66948c25bb7d90d561c1b8be3d69696ef649358f.tar.gz u-boot-imx-66948c25bb7d90d561c1b8be3d69696ef649358f.tar.bz2 |
nand_spl: remove nand_spl infrastructure
Remove the common infrastructure of nand_spl and
clean-up the code inside ifdef(CONFIG_NAND_U_BOOT)..endif.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
-rw-r--r-- | Makefile | 28 | ||||
-rw-r--r-- | arch/powerpc/cpu/ppc4xx/cpu.c | 3 | ||||
-rw-r--r-- | common/env_embedded.c | 2 | ||||
-rw-r--r-- | nand_spl/nand_boot.c | 285 | ||||
-rw-r--r-- | nand_spl/nand_boot_fsl_elbc.c | 142 |
5 files changed, 2 insertions, 458 deletions
@@ -515,12 +515,6 @@ endif # If there is no specified link script, we look in a number of places for it ifndef LDSCRIPT - ifeq ($(CONFIG_NAND_U_BOOT),y) - LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot-nand.lds - ifeq ($(wildcard $(LDSCRIPT)),) - LDSCRIPT := $(srctree)/$(CPUDIR)/u-boot-nand.lds - endif - endif ifeq ($(wildcard $(LDSCRIPT)),) LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot.lds endif @@ -742,7 +736,6 @@ endif # Always append ALL so that arch config.mk's can add custom ones ALL-y += u-boot.srec u-boot.bin System.map -ALL-$(CONFIG_NAND_U_BOOT) += u-boot-nand.bin ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin ifeq ($(CONFIG_SPL_FSL_PBL),y) ALL-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin @@ -1148,23 +1141,6 @@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \ u-boot.lds: $(LDSCRIPT) prepare FORCE $(call if_changed_dep,cpp_lds) -PHONY += nand_spl -nand_spl: prepare - $(Q)$(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all - @echo >&2 - @echo >&2 "==================== WARNING =====================" - @echo >&2 "nand_spl will not be included in v2014.07 release." - @echo >&2 "Please switch over to SPL." - @echo >&2 "Otherwise, this board will be removed." - @echo >&2 "==================================================" - @echo >&2 - -nand_spl/u-boot-spl-16k.bin: nand_spl - @: - -u-boot-nand.bin: nand_spl/u-boot-spl-16k.bin u-boot.bin FORCE - $(call if_changed,cat) - spl/u-boot-spl.bin: spl/u-boot-spl @: spl/u-boot-spl: tools prepare @@ -1257,7 +1233,7 @@ CLEAN_FILES += u-boot.lds include/bmp_logo.h include/bmp_logo_data.h \ CLOBBER_DIRS += $(patsubst %,spl/%, $(filter-out Makefile, \ $(shell ls -1 spl 2>/dev/null))) \ tpl -CLOBBER_FILES += u-boot* MLO* SPL System.map nand_spl/u-boot* +CLOBBER_FILES += u-boot* MLO* SPL System.map # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include/generated \ @@ -1290,8 +1266,6 @@ clean: $(clean-dirs) -o -name '*.symtypes' -o -name 'modules.order' \ -o -name modules.builtin -o -name '.tmp_*.o.*' \ -o -name '*.gcno' \) -type f -print | xargs rm -f - @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \ - -path './nand_spl/*' -type l -print | xargs rm -f # clobber # diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c index d1fc7f3..6a48526 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu.c +++ b/arch/powerpc/cpu/ppc4xx/cpu.c @@ -607,9 +607,6 @@ int checkcpu (void) #if defined(SDR0_PINSTP_SHIFT) printf (" Bootstrap Option %c - ", bootstrap_char[bootstrap_option()]); printf ("Boot ROM Location %s", bootstrap_str[bootstrap_option()]); -#ifdef CONFIG_NAND_U_BOOT - puts(", booting from NAND"); -#endif /* CONFIG_NAND_U_BOOT */ putc('\n'); #endif /* SDR0_PINSTP_SHIFT */ diff --git a/common/env_embedded.c b/common/env_embedded.c index 1c4f915..56a13cb 100644 --- a/common/env_embedded.c +++ b/common/env_embedded.c @@ -33,7 +33,7 @@ * a seperate section. Note that ENV_CRC is only defined when building * U-Boot itself. */ -#if (defined(CONFIG_SYS_USE_PPCENV) || defined(CONFIG_NAND_U_BOOT)) && \ +#if defined(CONFIG_SYS_USE_PPCENV) && \ defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */ /* XXX - This only works with GNU C */ # define __PPCENV__ __attribute__ ((section(".ppcenv"))) diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c deleted file mode 100644 index 125e7f3..0000000 --- a/nand_spl/nand_boot.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <nand.h> -#include <asm/io.h> - -static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; - -#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ - CONFIG_SYS_NAND_ECCSIZE) -#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES) - - -#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512) -/* - * NAND command for small page NAND devices (512) - */ -static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd) -{ - struct nand_chip *this = mtd->priv; - int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; - - while (!this->dev_ready(mtd)) - ; - - /* Begin command latch cycle */ - this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - /* Set ALE and clear CLE to start address cycle */ - /* Column address */ - this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ - this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, - NAND_CTRL_ALE); /* A[24:17] */ -#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE - /* One more address cycle for devices > 32MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, - NAND_CTRL_ALE); /* A[28:25] */ -#endif - /* Latch in address */ - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); - - /* - * Wait a while for the data to be ready - */ - while (!this->dev_ready(mtd)) - ; - - return 0; -} -#else -/* - * NAND command for large page NAND devices (2k) - */ -static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd) -{ - struct nand_chip *this = mtd->priv; - int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; - void (*hwctrl)(struct mtd_info *mtd, int cmd, - unsigned int ctrl) = this->cmd_ctrl; - - while (!this->dev_ready(mtd)) - ; - - /* Emulate NAND_CMD_READOOB */ - if (cmd == NAND_CMD_READOOB) { - offs += CONFIG_SYS_NAND_PAGE_SIZE; - cmd = NAND_CMD_READ0; - } - - /* Shift the offset from byte addressing to word addressing. */ - if (this->options & NAND_BUSWIDTH_16) - offs >>= 1; - - /* Begin command latch cycle */ - hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - /* Set ALE and clear CLE to start address cycle */ - /* Column address */ - hwctrl(mtd, offs & 0xff, - NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ - hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ - /* Row address */ - hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - hwctrl(mtd, ((page_addr >> 8) & 0xff), - NAND_CTRL_ALE); /* A[27:20] */ -#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE - /* One more address cycle for devices > 128MiB */ - hwctrl(mtd, (page_addr >> 16) & 0x0f, - NAND_CTRL_ALE); /* A[31:28] */ -#endif - /* Latch in address */ - hwctrl(mtd, NAND_CMD_READSTART, - NAND_CTRL_CLE | NAND_CTRL_CHANGE); - hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); - - /* - * Wait a while for the data to be ready - */ - while (!this->dev_ready(mtd)) - ; - - return 0; -} -#endif - -static int nand_is_bad_block(struct mtd_info *mtd, int block) -{ - struct nand_chip *this = mtd->priv; - - nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); - - /* - * Read one byte (or two if it's a 16 bit chip). - */ - if (this->options & NAND_BUSWIDTH_16) { - if (readw(this->IO_ADDR_R) != 0xffff) - return 1; - } else { - if (readb(this->IO_ADDR_R) != 0xff) - return 1; - } - - return 0; -} - -#if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) -static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) -{ - struct nand_chip *this = mtd->priv; - u_char ecc_calc[ECCTOTAL]; - u_char ecc_code[ECCTOTAL]; - u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; - int i; - int eccsize = CONFIG_SYS_NAND_ECCSIZE; - int eccbytes = CONFIG_SYS_NAND_ECCBYTES; - int eccsteps = ECCSTEPS; - uint8_t *p = dst; - - nand_command(mtd, block, page, 0, NAND_CMD_READOOB); - this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); - nand_command(mtd, block, page, 0, NAND_CMD_READ0); - - /* Pick the ECC bytes out of the oob data */ - for (i = 0; i < ECCTOTAL; i++) - ecc_code[i] = oob_data[nand_ecc_pos[i]]; - - - for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { - this->ecc.hwctl(mtd, NAND_ECC_READ); - this->read_buf(mtd, p, eccsize); - this->ecc.calculate(mtd, p, &ecc_calc[i]); - this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); - } - - return 0; -} -#else -static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) -{ - struct nand_chip *this = mtd->priv; - u_char ecc_calc[ECCTOTAL]; - u_char ecc_code[ECCTOTAL]; - u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; - int i; - int eccsize = CONFIG_SYS_NAND_ECCSIZE; - int eccbytes = CONFIG_SYS_NAND_ECCBYTES; - int eccsteps = ECCSTEPS; - uint8_t *p = dst; - - nand_command(mtd, block, page, 0, NAND_CMD_READ0); - - for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { - this->ecc.hwctl(mtd, NAND_ECC_READ); - this->read_buf(mtd, p, eccsize); - this->ecc.calculate(mtd, p, &ecc_calc[i]); - } - this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); - - /* Pick the ECC bytes out of the oob data */ - for (i = 0; i < ECCTOTAL; i++) - ecc_code[i] = oob_data[nand_ecc_pos[i]]; - - eccsteps = ECCSTEPS; - p = dst; - - for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { - /* No chance to do something with the possible error message - * from correct_data(). We just hope that all possible errors - * are corrected by this routine. - */ - this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); - } - - return 0; -} -#endif /* #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) */ - -static int nand_load(struct mtd_info *mtd, unsigned int offs, - unsigned int uboot_size, uchar *dst) -{ - unsigned int block, lastblock; - unsigned int page; - - /* - * offs has to be aligned to a page address! - */ - block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; - lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; - page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; - - while (block <= lastblock) { - if (!nand_is_bad_block(mtd, block)) { - /* - * Skip bad blocks - */ - while (page < CONFIG_SYS_NAND_PAGE_COUNT) { - nand_read_page(mtd, block, page, dst); - dst += CONFIG_SYS_NAND_PAGE_SIZE; - page++; - } - - page = 0; - } else { - lastblock++; - } - - block++; - } - - return 0; -} - -/* - * The main entry for NAND booting. It's necessary that SDRAM is already - * configured and available since this code loads the main U-Boot image - * from NAND into SDRAM and starts it from there. - */ -void nand_boot(void) -{ - struct nand_chip nand_chip; - nand_info_t nand_info; - __attribute__((noreturn)) void (*uboot)(void); - - /* - * Init board specific nand support - */ - nand_chip.select_chip = NULL; - nand_info.priv = &nand_chip; - nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; - nand_chip.dev_ready = NULL; /* preset to NULL */ - nand_chip.options = 0; - board_nand_init(&nand_chip); - - if (nand_chip.select_chip) - nand_chip.select_chip(&nand_info, 0); - - /* - * Load U-Boot image from NAND into RAM - */ - nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, - (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); - -#ifdef CONFIG_NAND_ENV_DST - nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, - (uchar *)CONFIG_NAND_ENV_DST); - -#ifdef CONFIG_ENV_OFFSET_REDUND - nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, - (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); -#endif -#endif - - if (nand_chip.select_chip) - nand_chip.select_chip(&nand_info, -1); - - /* - * Jump to U-Boot image - */ - uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; - (*uboot)(); -} diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c deleted file mode 100644 index 1afa1a2..0000000 --- a/nand_spl/nand_boot_fsl_elbc.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine - * - * (C) Copyright 2006-2008 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * Copyright (c) 2008 Freescale Semiconductor, Inc. - * Author: Scott Wood <scottwood@freescale.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/fsl_lbc.h> -#include <linux/mtd/nand.h> - -#define WINDOW_SIZE 8192 - -static void nand_wait(void) -{ - fsl_lbc_t *regs = LBC_BASE_ADDR; - - for (;;) { - uint32_t status = in_be32(®s->ltesr); - - if (status == 1) - return; - - if (status & 1) { - puts("read failed (ltesr)\n"); - for (;;); - } - } -} - -static void nand_load(unsigned int offs, int uboot_size, uchar *dst) -{ - fsl_lbc_t *regs = LBC_BASE_ADDR; - uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE; - const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS; - const int block_shift = large ? 17 : 14; - const int block_size = 1 << block_shift; - const int page_size = large ? 2048 : 512; - const int bad_marker = large ? page_size + 0 : page_size + 5; - int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2; - int pos = 0; - - if (offs & (block_size - 1)) { - puts("bad offset\n"); - for (;;); - } - - if (large) { - fmr |= FMR_ECCM; - __raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) | - (NAND_CMD_READSTART << FCR_CMD1_SHIFT), - ®s->fcr); - __raw_writel( - (FIR_OP_CW0 << FIR_OP0_SHIFT) | - (FIR_OP_CA << FIR_OP1_SHIFT) | - (FIR_OP_PA << FIR_OP2_SHIFT) | - (FIR_OP_CW1 << FIR_OP3_SHIFT) | - (FIR_OP_RBW << FIR_OP4_SHIFT), - ®s->fir); - } else { - __raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, ®s->fcr); - __raw_writel( - (FIR_OP_CW0 << FIR_OP0_SHIFT) | - (FIR_OP_CA << FIR_OP1_SHIFT) | - (FIR_OP_PA << FIR_OP2_SHIFT) | - (FIR_OP_RBW << FIR_OP3_SHIFT), - ®s->fir); - } - - __raw_writel(0, ®s->fbcr); - - while (pos < uboot_size) { - int i = 0; - __raw_writel(offs >> block_shift, ®s->fbar); - - do { - int j; - unsigned int page_offs = (offs & (block_size - 1)) << 1; - - __raw_writel(~0, ®s->ltesr); - __raw_writel(0, ®s->lteatr); - __raw_writel(page_offs, ®s->fpar); - __raw_writel(fmr, ®s->fmr); - sync(); - __raw_writel(0, ®s->lsor); - nand_wait(); - - page_offs %= WINDOW_SIZE; - - /* - * If either of the first two pages are marked bad, - * continue to the next block. - */ - if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) { - puts("skipping\n"); - offs = (offs + block_size) & ~(block_size - 1); - pos &= ~(block_size - 1); - break; - } - - for (j = 0; j < page_size; j++) - dst[pos + j] = buf[page_offs + j]; - - pos += page_size; - offs += page_size; - } while ((offs & (block_size - 1)) && (pos < uboot_size)); - } -} - -/* - * The main entry for NAND booting. It's necessary that SDRAM is already - * configured and available since this code loads the main U-Boot image - * from NAND into SDRAM and starts it from there. - */ -void nand_boot(void) -{ - __attribute__((noreturn)) void (*uboot)(void); - - /* - * Load U-Boot image from NAND into RAM - */ - nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, - (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); - - /* - * Jump to U-Boot image - */ - puts("transfering control\n"); - /* - * Clean d-cache and invalidate i-cache, to - * make sure that no stale data is executed. - */ - flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); - uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; - uboot(); -} |