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| author | Michal Simek <michal.simek@xilinx.com> | 2013-07-25 15:47:16 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2013-08-12 08:59:56 +0200 |
| commit | 2d83d33a51926d6471eb9282d03d83783850d565 (patch) | |
| tree | b7259f261c9eef38bc14ca115d55e843405a9b88 | |
| parent | 39523bef29f71967247ca00fe4b2c7e0831bb8a2 (diff) | |
| download | u-boot-imx-2d83d33a51926d6471eb9282d03d83783850d565.zip u-boot-imx-2d83d33a51926d6471eb9282d03d83783850d565.tar.gz u-boot-imx-2d83d33a51926d6471eb9282d03d83783850d565.tar.bz2 | |
zynq: Enable axi ethernet and emaclite driver initialization
Zynq can have axi ethernet and emaclite IPs in programmable
logic.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| -rw-r--r-- | board/xilinx/zynq/board.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index ca159b0..decdce5 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -61,6 +61,23 @@ int board_eth_init(bd_t *bis) { u32 ret = 0; +#ifdef CONFIG_XILINX_AXIEMAC + ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR, + XILINX_AXIDMA_BASEADDR); +#endif +#ifdef CONFIG_XILINX_EMACLITE + u32 txpp = 0; + u32 rxpp = 0; +# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG + txpp = 1; +# endif +# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG + rxpp = 1; +# endif + ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, + txpp, rxpp); +#endif + #if defined(CONFIG_ZYNQ_GEM) # if defined(CONFIG_ZYNQ_GEM0) ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0, |