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| author | Mike Frysinger <vapier@gentoo.org> | 2010-12-24 19:31:55 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2011-04-08 00:44:26 -0400 |
| commit | 105be9078c3aea7f323d2437baf4950401d941b2 (patch) | |
| tree | 5bb92746ac8e9f0d37585396b95463d33dd03475 | |
| parent | c745a84648d72a0c7ac7f8cce4abdaecfbb05ddc (diff) | |
| download | u-boot-imx-105be9078c3aea7f323d2437baf4950401d941b2.zip u-boot-imx-105be9078c3aea7f323d2437baf4950401d941b2.tar.gz u-boot-imx-105be9078c3aea7f323d2437baf4950401d941b2.tar.bz2 | |
Blackfin: default to L1 bank A when L1 bank B does not exist
Some parts lack Bank B in L1 data, so have the linker script fall back to
Bank A when that happens. This way we can still leverage L1 data.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| -rw-r--r-- | arch/blackfin/lib/u-boot.lds.S | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/blackfin/lib/u-boot.lds.S b/arch/blackfin/lib/u-boot.lds.S index f15c97e..2b8d285 100644 --- a/arch/blackfin/lib/u-boot.lds.S +++ b/arch/blackfin/lib/u-boot.lds.S @@ -40,9 +40,13 @@ * This is here in the first place so we can quickly test building * for different CPU's which may lack non-cache L1 data. */ +#ifndef L1_DATA_A_SRAM +# define L1_DATA_A_SRAM 0 +# define L1_DATA_A_SRAM_SIZE 0 +#endif #ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE -# define L1_DATA_B_SRAM_SIZE 0 +# define L1_DATA_B_SRAM L1_DATA_A_SRAM +# define L1_DATA_B_SRAM_SIZE L1_DATA_A_SRAM_SIZE #endif /* The 0xC offset is so we don't clobber the tiny LDR jump block. */ @@ -138,7 +142,7 @@ SECTIONS } >l1_data AT>ram_data __data_l1_lma = LOADADDR(.data_l1); __data_l1_len = SIZEOF(.data_l1); - ASSERT (__data_l1_len <= L1_DATA_B_SRAM_SIZE, "L1 data B overflow!") + ASSERT (__data_l1_len <= L1_DATA_B_SRAM_SIZE, "L1 data overflow!") .bss : { |