85xx: Convert MPC8540EVAL to new TLB setup

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

5 files changed, 80 insertions, 141 deletions

diff --git a/board/mpc8540eval/Makefile b/board/mpc8540eval/Makefile
index c892247..28d6cb9 100644
--- a/board/mpc8540eval/Makefile
+++ b/board/mpc8540eval/Makefile
@@ -25,8 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= $(BOARD).o flash.o law.o
-SOBJS	:= init.o
+COBJS	:= $(BOARD).o flash.o law.o tlb.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/mpc8540eval/init.S b/board/mpc8540eval/init.S
deleted file mode 100644
index 93654a5..0000000
--- a/board/mpc8540eval/init.S
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
-* Copyright (C) 2002,2003, Motorola Inc.
-* Xianghua Xiao <X.Xiao@motorola.com>
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-#define	entry_start \
-	mflr	r1 	;	\
-	bl	0f 	;
-
-#define	entry_end \
-0:	mflr	r0	;	\
-	mtlr	r1	;	\
-	blr		;
-
-/* TLB1 entries configuration: */
-
-	.section	.bootpg, "ax"
-	.globl	tlb1_entry
-tlb1_entry:
-	entry_start
-
-	.long 0x0a	/* the following data table uses a few of 16 TLB entries */
-
-	.long FSL_BOOKE_MAS0(1,1,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
-	.long FSL_BOOKE_MAS2(CFG_CCSRBAR,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_CCSRBAR,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-  #if defined(CFG_FLASH_PORT_WIDTH_16)
-	.long FSL_BOOKE_MAS0(1,2,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_4M)
-	.long FSL_BOOKE_MAS2(CFG_FLASH_BASE,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_FLASH_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,3,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_4M)
-	.long FSL_BOOKE_MAS2(CFG_FLASH_BASE+0x400000,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_FLASH_BASE+0x400000,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-  #else
-	.long FSL_BOOKE_MAS0(1,2,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16M)
-	.long FSL_BOOKE_MAS2(CFG_FLASH_BASE,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_FLASH_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,3,0)
-	.long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
-	.long FSL_BOOKE_MAS2(0,0)
-	.long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-  #endif
-
-  #if !defined(CONFIG_SPD_EEPROM)
-	.long FSL_BOOKE_MAS0(1,4,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
-	.long FSL_BOOKE_MAS2(CFG_DDR_SDRAM_BASE,0)
-	.long FSL_BOOKE_MAS3(CFG_DDR_SDRAM_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,5,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
-	.long FSL_BOOKE_MAS2(CFG_DDR_SDRAM_BASE+0x4000000,0)
-	.long FSL_BOOKE_MAS3(CFG_DDR_SDRAM_BASE+0x4000000,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-  #else
-	.long FSL_BOOKE_MAS0(1,4,0)
-	.long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
-	.long FSL_BOOKE_MAS2(0,0)
-	.long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,5,0)
-	.long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
-	.long FSL_BOOKE_MAS2(0,0)
-	.long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-  #endif
-
-	.long FSL_BOOKE_MAS0(1,6,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
-  #if defined(CONFIG_RAM_AS_FLASH)
-	.long FSL_BOOKE_MAS2(CFG_LBC_SDRAM_BASE,(MAS2_I|MAS2_G))
-  #else
-	.long FSL_BOOKE_MAS2(CFG_LBC_SDRAM_BASE,0)
-  #endif
-	.long FSL_BOOKE_MAS3(CFG_LBC_SDRAM_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,7,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
-  #ifdef CONFIG_L2_INIT_RAM
-	.long FSL_BOOKE_MAS2(CFG_INIT_RAM_ADDR,0,0,0,1,0,0,0,0)
-  #else
-	.long FSL_BOOKE_MAS2(CFG_INIT_RAM_ADDR,0)
-  #endif
-	.long FSL_BOOKE_MAS3(CFG_INIT_RAM_ADDR,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,8,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
-	.long FSL_BOOKE_MAS2(CFG_PCI_MEM_PHYS,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_PCI_MEM_PHYS,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-	.long FSL_BOOKE_MAS0(1,9,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
-	.long FSL_BOOKE_MAS2(CFG_BCSR,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_BCSR,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-
-  #if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
-	.long FSL_BOOKE_MAS0(1,15,0)
-	.long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
-	.long FSL_BOOKE_MAS2(CFG_CCSRBAR_DEFAULT,(MAS2_I|MAS2_G))
-	.long FSL_BOOKE_MAS3(CFG_CCSRBAR_DEFAULT,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-  #else
-	.long FSL_BOOKE_MAS0(1,15,0)
-	.long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
-	.long FSL_BOOKE_MAS2(0,0)
-	.long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
-  #endif
-	entry_end
diff --git a/board/mpc8540eval/tlb.c b/board/mpc8540eval/tlb.c
new file mode 100644
index 0000000..f041236
--- /dev/null
+++ b/board/mpc8540eval/tlb.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/mmu.h>
+
+struct fsl_e_tlb_entry tlb_table[] = {
+	SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 1, BOOKE_PAGESZ_1M, 1),
+
+  #if defined(CFG_FLASH_PORT_WIDTH_16)
+	SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 2, BOOKE_PAGESZ_4M, 1),
+	SET_TLB_ENTRY(1, CFG_FLASH_BASE + 0x400000, CFG_FLASH_BASE + 0x400000,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 3, BOOKE_PAGESZ_4M, 1),
+  #else
+	SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 2, BOOKE_PAGESZ_16M, 1),
+  #endif
+
+  #if !defined(CONFIG_SPD_EEPROM)
+	SET_TLB_ENTRY(1, CFG_DDR_SDRAM_BASE, CFG_DDR_SDRAM_BASE,
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+		      0, 4, BOOKE_PAGESZ_64M, 1),
+
+	SET_TLB_ENTRY(1, CFG_DDR_SDRAM_BASE + 0x4000000, CFG_DDR_SDRAM_BASE + 0x4000000,
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+		      0, 5, BOOKE_PAGESZ_64M, 1),
+  #endif
+
+	SET_TLB_ENTRY(1, CFG_LBC_SDRAM_BASE, CFG_LBC_SDRAM_BASE,
+  #if defined(CONFIG_RAM_AS_FLASH)
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+  #else
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+  #endif
+		      0, 6, BOOKE_PAGESZ_64M, 1),
+
+	SET_TLB_ENTRY(1, CFG_INIT_RAM_ADDR, CFG_INIT_RAM_ADDR,
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+		      0, 7, BOOKE_PAGESZ_16K, 1),
+
+	SET_TLB_ENTRY(1, CFG_PCI_MEM_PHYS, CFG_PCI_MEM_PHYS,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 8, BOOKE_PAGESZ_256M, 1),
+
+	SET_TLB_ENTRY(1, CFG_BCSR, CFG_BCSR,
+		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+		      0, 9, BOOKE_PAGESZ_16K, 1),
+};
+
+int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/board/mpc8540eval/u-boot.lds b/board/mpc8540eval/u-boot.lds
index 4b342c7..9bbba30 100644
--- a/board/mpc8540eval/u-boot.lds
+++ b/board/mpc8540eval/u-boot.lds
@@ -56,7 +56,6 @@ SECTIONS
   .text      :
   {
     cpu/mpc85xx/start.o	(.text)
-    board/mpc8540eval/init.o (.text)
     cpu/mpc85xx/traps.o (.text)
     cpu/mpc85xx/interrupts.o (.text)
     cpu/mpc85xx/cpu_init.o (.text)
@@ -143,7 +142,6 @@ SECTIONS
   .bootpg   :
   {
     cpu/mpc85xx/start.o	(.bootpg)
-    board/mpc8540eval/init.o (.bootpg)
   } = 0xffff
 
   . = (. & 0xFFF80000) + 0x0007FFFC;
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index bf64f27..416cee4 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -44,6 +44,7 @@
 #define CONFIG_DDR_DLL                      /* possible DLL fix needed */
 
 #define CONFIG_FSL_LAW		1	/* Use common FSL init code */
+#define CONFIG_FSL_INIT_TLBS	1	/* Use common FSL init code */
 
 /* Using Localbus SDRAM to emulate flash before we can program the flash,
  * normally you only need a flash-boot image(u-boot.bin),if unsure undef this.