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authorSimon Glass <sjg@chromium.org>2011-12-10 11:08:00 +0000
committerWolfgang Denk <wd@denx.de>2012-03-18 21:27:20 +0100
commitcd24a6bf2183ac24080e0348e193ba627711fcbc (patch)
tree5d6dd1aafe1692905e5d3a57f99d35d109b533c8
parent90e153d7709634eec903fc9c1a60878379915e33 (diff)
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bootstage: Convert NAND progress numbers to enums
This changes over the NAND progress numbers to use enums from bootstage.h. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--common/cmd_nand.c34
-rw-r--r--include/bootstage.h15
2 files changed, 32 insertions, 17 deletions
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 173e551..09be9a7 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -788,7 +788,7 @@ static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand,
if (s != NULL &&
(strcmp(s, ".jffs2") && strcmp(s, ".e") && strcmp(s, ".i"))) {
printf("Unknown nand load suffix '%s'\n", s);
- show_boot_error(53);
+ show_boot_error(BOOTSTAGE_ID_NAND_SUFFIX);
return 1;
}
@@ -798,16 +798,16 @@ static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand,
r = nand_read_skip_bad(nand, offset, &cnt, (u_char *) addr);
if (r) {
puts("** Read error\n");
- show_boot_error(56);
+ show_boot_error(BOOTSTAGE_ID_NAND_HDR_READ);
return 1;
}
- show_boot_progress (56);
+ show_boot_progress(BOOTSTAGE_ID_NAND_HDR_READ);
switch (genimg_get_format ((void *)addr)) {
case IMAGE_FORMAT_LEGACY:
hdr = (image_header_t *)addr;
- show_boot_progress (57);
+ show_boot_progress(BOOTSTAGE_ID_NAND_TYPE);
image_print_contents (hdr);
cnt = image_get_image_size (hdr);
@@ -821,29 +821,29 @@ static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand,
break;
#endif
default:
- show_boot_error(57);
+ show_boot_error(BOOTSTAGE_ID_NAND_TYPE);
puts ("** Unknown image type\n");
return 1;
}
- show_boot_progress (57);
+ show_boot_progress(BOOTSTAGE_ID_NAND_TYPE);
r = nand_read_skip_bad(nand, offset, &cnt, (u_char *) addr);
if (r) {
puts("** Read error\n");
- show_boot_error(58);
+ show_boot_error(BOOTSTAGE_ID_NAND_READ);
return 1;
}
- show_boot_progress (58);
+ show_boot_progress(BOOTSTAGE_ID_NAND_READ);
#if defined(CONFIG_FIT)
/* This cannot be done earlier, we need complete FIT image in RAM first */
if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
if (!fit_check_format (fit_hdr)) {
- show_boot_error(150);
+ show_boot_error(BOOTSTAGE_ID_NAND_FIT_READ);
puts ("** Bad FIT image format\n");
return 1;
}
- show_boot_progress (151);
+ show_boot_progress(BOOTSTAGE_ID_NAND_FIT_READ_OK);
fit_print_contents (fit_hdr);
}
#endif
@@ -885,7 +885,7 @@ int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
}
#endif
- show_boot_progress(52);
+ show_boot_progress(BOOTSTAGE_ID_NAND_PART);
switch (argc) {
case 1:
addr = CONFIG_SYS_LOAD_ADDR;
@@ -908,26 +908,26 @@ int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
#if defined(CONFIG_CMD_MTDPARTS)
usage:
#endif
- show_boot_error(53);
+ show_boot_error(BOOTSTAGE_ID_NAND_SUFFIX);
return CMD_RET_USAGE;
}
+ show_boot_progress(BOOTSTAGE_ID_NAND_SUFFIX);
- show_boot_progress(53);
if (!boot_device) {
puts("\n** No boot device **\n");
- show_boot_error(54);
+ show_boot_error(BOOTSTAGE_ID_NAND_BOOT_DEVICE);
return 1;
}
- show_boot_progress(54);
+ show_boot_progress(BOOTSTAGE_ID_NAND_BOOT_DEVICE);
idx = simple_strtoul(boot_device, NULL, 16);
if (idx < 0 || idx >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[idx].name) {
printf("\n** Device %d not available\n", idx);
- show_boot_error(55);
+ show_boot_error(BOOTSTAGE_ID_NAND_AVAILABLE);
return 1;
}
- show_boot_progress(55);
+ show_boot_progress(BOOTSTAGE_ID_NAND_AVAILABLE);
return nand_load_image(cmdtp, &nand_info[idx], offset, addr, argv[0]);
}
diff --git a/include/bootstage.h b/include/bootstage.h
index fec3c3c..d58c46b 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -105,6 +105,21 @@ enum bootstage_id {
BOOTSTAGE_ID_IDE_CHECKSUM, /* 50 */
BOOTSTAGE_ID_IDE_READ,
+
+ /* Boot stages related to loading a kernel from an NAND device */
+ BOOTSTAGE_ID_NAND_PART,
+ BOOTSTAGE_ID_NAND_SUFFIX,
+ BOOTSTAGE_ID_NAND_BOOT_DEVICE,
+ BOOTSTAGE_ID_NAND_HDR_READ = 55,
+ BOOTSTAGE_ID_NAND_AVAILABLE = 55,
+ BOOTSTAGE_ID_NAND_TYPE = 57,
+ BOOTSTAGE_ID_NAND_READ,
+
+ BOOTSTAGE_ID_IDE_FIT_READ = 140,
+ BOOTSTAGE_ID_IDE_FIT_READ_OK,
+
+ BOOTSTAGE_ID_NAND_FIT_READ = 150,
+ BOOTSTAGE_ID_NAND_FIT_READ_OK,
};
/*