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| author | Tetsuyuki Kobayashi <koba@kmckk.co.jp> | 2012-09-13 19:07:59 +0000 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2012-10-16 05:47:20 +0200 |
| commit | 020ec727a6bda10f47d69926814d476c0085e8a9 (patch) | |
| tree | 45d2bed504be4461528081d6fb3594ec50c6344d | |
| parent | 3ce2703d8f11b0b5c28409d8335f36bef258831b (diff) | |
| download | u-boot-imx-020ec727a6bda10f47d69926814d476c0085e8a9.zip u-boot-imx-020ec727a6bda10f47d69926814d476c0085e8a9.tar.gz u-boot-imx-020ec727a6bda10f47d69926814d476c0085e8a9.tar.bz2 | |
i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
| -rw-r--r-- | drivers/i2c/sh_i2c.c | 15 | ||||
| -rw-r--r-- | include/configs/kzm9g.h | 5 |
2 files changed, 19 insertions, 1 deletions
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index c667a1b..d50c8ec 100644 --- a/drivers/i2c/sh_i2c.c +++ b/drivers/i2c/sh_i2c.c @@ -184,6 +184,21 @@ int i2c_set_bus_num(unsigned int bus) case 1: base = (void *)CONFIG_SH_I2C_BASE1; break; +#ifdef CONFIG_SH_I2C_BASE2 + case 2: + base = (void *)CONFIG_SH_I2C_BASE2; + break; +#endif +#ifdef CONFIG_SH_I2C_BASE3 + case 3: + base = (void *)CONFIG_SH_I2C_BASE3; + break; +#endif +#ifdef CONFIG_SH_I2C_BASE4 + case 4: + base = (void *)CONFIG_SH_I2C_BASE4; + break; +#endif default: return -1; } diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 75b9257..4898fb6 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -157,7 +157,7 @@ #define CONFIG_SH_I2C_8BIT #define CONFIG_HARD_I2C #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_MAX_I2C_BUS (2) +#define CONFIG_SYS_MAX_I2C_BUS (5) #define CONFIG_SYS_I2C_MODULE #define CONFIG_SYS_I2C_SPEED (100000) /* 100 kHz */ #define CONFIG_SYS_I2C_SLAVE (0x7F) @@ -166,5 +166,8 @@ #define CONFIG_SH_I2C_CLOCK (104000000) /* 104 MHz */ #define CONFIG_SH_I2C_BASE0 (0xE6820000) #define CONFIG_SH_I2C_BASE1 (0xE6822000) +#define CONFIG_SH_I2C_BASE2 (0xE6824000) +#define CONFIG_SH_I2C_BASE3 (0xE6826000) +#define CONFIG_SH_I2C_BASE4 (0xE6828000) #endif /* __KZM9G_H */ |